MC100EL1648
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4
Table 4. PECL DC CHARACTERISTICS V
CC
= 5.0 V; V
EE
= 0.0 V +0.8 / 0.5 V (Note 2)
Symbol
Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Power Supply Current 13 19 25 13 19 25 13 19 25 mA
V
OH
Output HIGH Voltage (Note 3) 3950 4170 4610 3950 4170 4610 3950 4170 4610 mV
V
OL
Output LOW Voltage (Note 3) 3040 3410 3600 3040 3410 3600 3040 3410 3600 mV
AGC Automatic Gain Control Input 1690 1980 1690 1980 1690 1980 mV
V
BIAS
Bias Voltage (Note 4) 1650 1800 1650 1800 1650 1800 mV
V
IL
1.5 1.35 1.2 V
V
IH
2.0 1.85 1.7 V
I
L
Input Current 5.0 5.0 5.0 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Output parameters vary 1:1 with V
CC
.
3. 1.0 MW impedance.
4. This measurement guarantees the dc potential at the bias point for purposes of incorporating a varactor tuning diode at this point.
Table 5. NECL DC CHARACTERISTICS V
CC
= 0.0 V; V
EE
= 5.0 V +0.8 / 0.5 V (Note 5)
Symbol
Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Power Supply Current 13 19 25 13 19 25 13 19 25 mA
V
OH
Output HIGH Voltage (Note 6) 1050 830 399 1050 830 399 1050 830 399 mV
V
OL
Output LOW Voltage (Note 6) 1960 1590 1400 1960 1590 1400 1960 1590 1400 mV
AGC Automatic Gain Control Input 3310 3020 3310 3020 3310 3020 mV
V
BIAS
Bias Voltage (Note 7) 3350 3200 3350 3200 3350 3200 mV
V
IL
3.5 3.65 3.8 V
V
IH
3.0 3.15 3.3 V
I
L
Input Current 5.0 5.0 5.0 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Output parameters vary 1:1 with V
CC
.
6. 1.0 MW impedance.
7. This measurement guarantees the dc potential at the bias point for purposes of incorporating a varactor tuning diode at this point.
MC100EL1648
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5
GENERIC TEST CIRCUITS: Bypass to Supply Opposite GND
Figure 3. Typical Test Circuit with Alternate Tank Circuits
0.1mF
C
L
8 (10)
1 (12)
4 (3)
V
CC
* Use high impedance probe (>1.0 MW must be
used).
** The 1200 W resistor and the scope termination
impedance constitute a 25:1 attenuator probe.
Coax shall be CT07050 or equivalent.
3 (1) 2 (14)
C
L
4 (3)
V
CC
3 (1) 2 (14)
V
IN
F
OUT
Tank #1
8 (10)
1 (12)
*
Note 1 Capacitor for tank may be variable type.
(See Tank Circuit #3.)
Note 2 Use high impedance probe (> 1 MW ).
Test Point
F
OUT
Tank #2
Tank Circuit Option #1, Varactor Diode
Tank Circuit Option #2, Fixed LC
L = Micro Metal torroid #T2022, 8 turns #30
Enameled Copper wire (@ 40 nH)
C = MMBV609
L = Micro Metal torroid #T2022, 8 turns #30
Enameled Copper wire (@ 40 nH)
C = 3.035pF Variable Capacitance (@ 10 pF)
0.1 mF0.1 mF
0.1 mF0.1 mF
8 pin (14 pin) Lead Package
8 pin (14 pin) Lead Package
**
5 (5)6 (7) 7 (8)
V
EE
0.1 mF 0.1 mF0.01 mF100 mF
5 (5)6 (7) 7 (8)
V
EE
0.1 mF 0.1 mF0.01 mF100 mF
1 KW
50%
t
a
t
b
V
P-P
PRF = 1.0MHz
Duty Cycle (Vdc) -
t
a
t
b
Figure 4. Output Waveform
MC100EL1648
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OPERATION THEORY
Figure 5 illustrates the simplified circuit schematic for the
MC100EL1648. The oscillator incorporates positive feedback
by coupling the base of transistor Q6 to the collector of Q7. An
automatic gain control (AGC) is incorporated to limit the
current through the emittercoupled pair of transistors (Q7 and
Q6) and allow optimum frequency response of the oscillator.
In order to maintain the high quality factor (Q) on the oscillator,
and provide high spectral purity at the output, transistor Q4 is
used to translate the oscillator signal to the output differential
pair Q2 and Q3. Figure 16 indicates the high spectral purity
of the oscillator output (pin 4 on 8pin SOIC). Transistors
Q2 and Q3, in conjunction with output transistor Q1,
provide a highly buffered output that produces a square
wave. The typical output waveform can be seen in Figure 4.
The bias drive for the oscillator and output buffer is provided
by Q9 and Q11 transistors. In order to minimize current, the
output circuit is realized as an emitterfollower buffer with
an on chip pulldown resistor R
E
.
Figure 5. Circuit Schematic
AGCV
EE
TANKBIASV
EE
V
CC
V
CC
Q4
Q3 Q2
Q1
Q5
D1
Q8
Q7 Q6
Q9
Q10Q11
D2
OUTPUT
800 W 1.36 KW
1.6 KW
3.1 KW
660 W 167 W
400 W
330 W
16 KW
82 W 400 W 660 W 510 W
2 (14) 3 (1)
4 (3)
1 (12) 5 (5)8 (10)7 (8) 6 (7)
8 pin (14 pin) Lead Package

MC100EL1648MNR4G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Bipolar Transistors - BJT BBG ECL LOW PWER VCO
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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