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ICS525R-02I

P1-P3P4-P6P7-P9
OSCaR
TM
User Configurable Clock
MDS 525-01/02 R 4 Revision 021710
Integrated Device Technology, Inc. ● www.idt.com
ICS525-01/02
External Components/Crystal
Selection
Decoupling Capacitors
The ICS525-01/02 requries two 0.01µF decoupling
capacitors to be connected between VDD and GND,
one on each side of the chip. The capacitor must be
connected close to the device to minimize lead
inductance. No external power supply filtering is
required for this device.
External Resistors
A 33Ω series terminating resistor can be used next to
the CLK and REF pins.
Crystal Load Capacitors
The approximate total on-chip capacitance for a crystal
is 16 pF, so a parallel resonant, fundamental mode
crystal with this value of load (correlation) capacitance
should be used. For crystals with a specified load
capacitance greater than 16 pF, crystal capacitors may
be connected from each of the pins X1 and X2 to
Ground as shown in the block diagram. The value (in
pF) of these crystal caps should be (CL -16)*2, where
CL is the crystal load capacitance in pF. These external
capacitors are only required for applications where the
exact frequency is critical. For a clock input, connect to
X1 and leave X2 unconnected (no capacitors on
either).
Determining the Output Frequency
Users have full control in setting the desired output
frequency over the range shown in the table on page 2.
To replace a standard oscillator, users should connect
the divider select input pins directly to ground (or VDD,
although this is not required because of internal
pull-ups) during Printed Circuit Board layout. The
ICS525-01/02 will automatically produce the correct
clock when all components are soldered. It is also
possible to connect the inputs to parallel I/O ports to
switch frequencies. By choosing divides carefully, the
number of inputs which need to be changed can be
minimized. Observe the restrictions on allowed values
of VDW and RDW.
ICS525-01 Settings
The output of the ICS525-01 can be determined by the
following simple equation:
Where:
Reference Divider Word (RDW) = 1 to 127 (0 not
permitted)
VCO Divider Word (VDW) = 4 to 511 (0, 1, 2, 3 not
permitted)
Output Divider (OD) = values on page 3
Also, the following operating ranges should be
observed:
See table on page 3 for full details of maximum
output.
ICS525-02 Settings
The output of the ICS525-02 can be determined by the
following simple equation:
Where:
Reference Divider Word (RDW) = 0 to 127
VCO Divider Word (VDW) = 0 to 511
Output Divider (OD) = values on page 3
Also, the following operating ranges should be
observed:
See table on page 3 for full details of maximum
output.
CLK Frequency Input Frequency 2x
VDW 8+()
RDW 2+()OD•
---------------------------------------------
×=
30M Input Frequencyx2x
VDW 8+()
RDW 2+()
-------------------------------200M
3.3V()or320M 5v
)
(<<
200kHz
InputFrequency
RDW 2+()
-----------------------------------------------<
CLK Frequency Input Frequency 2x
VDW 8+()
RDW 2+()OD•
---------------------------------------------
×=
30M Input Frequencyx2x
VDW 8+()
RDW 2+()
-------------------------------
240M 3.3V()or400M 5v
)
(<<
200kHz
InputFrequency
RDW 2+()
-----------------------------------------------<
OSCaR
TM
User Configurable Clock
MDS 525-01/02 R 5 Revision 021710
Integrated Device Technology, Inc. ● www.idt.com
ICS525-01/02
The dividers are expressed as integers. For example, if a 66.66 MHz output on CLK1 is desired from a
14.31818 MHz input, the VCO divider word (VDW) should be 276, with an output divide (OD) of 2. In this
example, R6:R0 is 0111011, V8:V0 is 100010100 and S2:S0 is 001. Since all of these inputs have pull-up
resistors, it is only necessary to ground the zero pins, namely V7, V6, V5, V3, V1, V0, R6, R2, S2, and S1.
To determine the best combination of VCO, reference, and output divide, use the ICS525 Calculator on our
web site: www.icst.com/products/ics525inputForm.html. The online form is easy to use and quickly shows
you up to three options for these settings. Alternately, you may send an e-mail to ics-mk@icst.com.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS525-01/02. These ratings,
which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item Rating
Supply Voltage, VDD 7 V
All Inputs and Outputs -0.5 V to VDD+0.5 V
Ambient Operating Temperature, Commercial 0 to +70° C
Ambient Operating Temperature, Industrial -40 to +85° C
Storage Temperature -65° C to 150° C
Junction Temperature 125° C
Soldering Temperature 260° C (max. of 10 seconds)
OSCaR
TM
User Configurable Clock
MDS 525-01/02 R 6 Revision 021710
Integrated Device Technology, Inc. ● www.idt.com
ICS525-01/02
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V
Parameter Symbol Conditions Min. Typ. Max. Units
Operating Voltage VDD 3.0 5.5 V
Operating Supply Current,
15 MHz crystal
IDD 60 MHz out, no load 8 mA
Operating Supply Current,
Power-down
IDD Pin 19 = 0 7 mA
Input High Voltage V
IH
2V
Input Low Voltage V
IL
0.8 V
Input High Voltage,
X1/ICLK only
V
IH
ICLK (pin7)
VDD/2+1
VDD/2 V
Input Low Voltage, X1/ICLK
only
V
IL
ICLK (pin7) VDD/2
VDD/2-1
V
Output High Voltage V
OH
I
OH
= -12 mA
VDD-0.4
V
Output Low Voltage V
OL
I
OL
= 12 mA 0.4 V
Short Circuit Current CLK and REF outputs ±55 mA
Input Capacitance C
IN
V, R, S pins and pin 19 4 pF
On-chip Pull-up Resistor R
PU
V, R, S pins and pin 19 270 kΩ
Parameter Symbol Conditions Min. Typ. Max. Units
Input Frequency F
IN
Crystal input 5 27 MHz
Clock input 2 50 MHz
Output Frequency, VDD=4.5 to
5 V (ICS525-01, Note 1)
F
OUT
0 to +70° C1.2160MHz
-40 to +85° C1.4140MHz
Output Frequency, VDD=3.0 to
3.6 V (ICS525-01, Note 1)
F
OUT
0 to +70° C1.2100MHz
-40 to +85° C1.490MHz
Output Frequency, VDD=4.5 to
5 V (ICS525-02, Note 1)
F
OUT
-40 to +85° C1.5250MHz
Output Frequency, VDD=3.0 to
3.6 V (ICS525-02, Note 1)
F
OUT
-40 to +85° C1200MHz
Output Clock Rise Time 0.8 to 2.0 V 1 ns
Output Clock Fall Time 2.0 to 0.8 V 1 ns
P1-P3P4-P6P7-P9

ICS525R-02I

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IC CLOCK USER CONFIGURE 28-SSOP
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