AD8387
Rev. 0 | Page 7 of 16
Table 3. 80-Lead TQFP E-Pad Pin Configurations
Pin No. Mnemonic Function Description
1 to 7,
76 to 80;
DBA(0:11) Data Input 12-Bit Data Input for Even Channels. VID(0, 2, 4, 6, 8, 10), MSB = DBA11.
14 to 25 DBB(0:11) Data Input 12-Bit Data Input for Odd Channels. VID(1, 3, 5, 7, 9, 11), MSB = DBB11.
8 XFR Transfer/Start Sequence
Simultaneously initiates a new data loading sequence and transfers data
loaded previously, to the outputs.
9, 26, 75 DVCCx Digital Power Supplies Digital Power Supplies.
10, 27, 74 DGNDx Digital Ground These pins are normally connected to the digital ground plane.
11 CLK Clock Clock Input.
12 DSW Data Mode Switch Selects Single Buss or Dual Buss Operating Modes.
13 R/L Right/Left Select Selects Left Direction or Right Direction Operating Mode.
28 ISW Invert Mode Switch Enables and Disables Column Inversion.
29 INV Invert Changes the Polarity of the Analog Output Signals.
30 GSW Output Mode Switch Enables and Disables Grounded Mode.
31 TSW Thermal Switch Enables and Disables Long-Term Output Protection.
32, 33, 39, 43,
47, 51, 55, 59,
63, 69, 70
AGNDx Analog Ground Analog Supply Returns.
34, 35, 41,
45, 49, 53,
57, 61, 67, 68
AVCCx Analog Power Supplies Analog Power Supplies.
36 BYP Bypass
A 0.1 μF capacitor connected between BYP and AGND ensures optimum
settling time.
37 TSTA Test Pin Connect This Pin to AGND.
38, 71 to 73 NC NC No Connect. No internal connection.
40, 42, 44, 46,
48, 50, 52, 54,
56, 58, 60, 62
VID0 to VID11 Analog Outputs These pins are connected directly to the analog inputs of the LCD panel.
64 VRL Video Center Reference
This Voltage Sets the Video Center Voltage. The video outputs are above
this reference while INV = HIGH and below this reference while INV = LOW.
65, 66 VRH Full-Scale Reference
Twice the voltage applied between VRH and VRL sets the full-scale
video output voltage.
