NIV1161, NIS1161
www.onsemi.com
2
ELECTRICAL CHARACTERISTICS (T
A
= 25_C unless otherwise specified)
Parameter Symbol Conditions Min Typ Max Unit
Reverse Working Voltage V
RWM
I/O Pin to GND 5 16 V
Breakdown Voltage V
BR
I
T
= 1 mA, I/O Pin to GND 16.5 V
Reverse Leakage Current I
R
V
RWM
= 5 V, I/O Pin to GND 1.0 mA
Clamping Voltage V
C
I
PP
= 1 A, I/O Pin to GND (8/20 ms pulse) 26 V
Clamping Voltage (Note 1) V
C
IEC61000−4−2, ±8 KV Contact See Figures 1 & 2
Clamping Voltage TLP (Note 2)
See Figures 5 & 6
V
C
I
PP
= 8 A
I
PP
= 16 A
I
PP
= −8 A
I
PP
= −16 A
34
55
−5.2
−10
V
V
V
V
Junction Capacitance Match D C
J
V
R
= 0 V, f = 1 MHz between I/O 1 to GND
and I/O 2 to GND
1.0 %
Junction Capacitance C
J
V
R
= 0 V, f = 1 MHz between I/O Pins and
GND (Pin 4 to GND, Pin 6 to GND)
0.65 pF
Drain−to−Source Breakdown Voltage V
BR(DSS)
V
GS
= 0 V, I
D
= 100 mA 30 V
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
BR(DSS)
/
T
J
Reference to 25_C, I
D
= 100 mA 27 mV/_C
Zero Gate Voltage Drain Current I
DSS
V
GS
= 0 V, V
DS
= 30 V 1.0 mA
Gate−to−Source Leakage Current I
GSS
V
DS
= 0 V, V
GS
= ±5 V ±1.0 mA
Gate Threshold Voltage (Note 3) V
GS(TH)
V
DS
= V
GS
, I
D
= 100 mA 0.1 1.0 1.5 V
Gate Threshold Voltage Temperature
Coefficient
V
GS(TH)
/T
J
Reference to 25_C, I
D
= 100 mA −2.5 mV/_C
Drain−to−Source On Resistance R
DS(on)
V
GS
= 4.5 V, I
D
= 125 mA 1.4 7.0 W
V
GS
= 2.5 V, I
D
= 125 mA 2.3 7.5
Forward Transconductance g
FS
V
DS
= 3.0 V, I
D
= 125 mA 80 mS
Switching Turn−On Delay Time (Note 4) t
d(ON)
V
GS
= 4.5 V, V
DS
= 24 V
I
D
= 125 mA, R
G
= 10 VW
9 nS
Switching Turn−On Rise Time (Note 4) t
r
41 nS
Switching Turn−Off Delay Time (Note 4) t
d(OFF)
96 nS
Switching Turn−Off Fall Time (Note 4) t
f
72 nS
Drain−to−Source Forward Diode Voltage V
SD
V
GS
= 0 V, I
s
= 125 mA 0.79 0.9 V
3 dB Bandwidth f
BW
R
L
= 50 W 5 GHz
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. For test procedure see Figures 3 and 4 and application note AND8307/D.
2. ANSI/ESD STM5.5.1 * Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z0 = 50W, tp = 100 ns, tr = 4 ns, averaging window; t1 = 30 ns to t2 = 60 ns.
3. Pulse test: pulse width ≤ 300 mS, duty cycle ≤ 2%
4. Switching characteristics are independent of operating junction temperatures.
