NIV1161, NIS1161
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APPLICATION INFORMATION
Today’s connected cars are using multiple high speed
signal pair interfaces for various applications such as
infotainment, connectivity and ADAS. The electrical
hazards likely to be encountered in these automotive high
speed signal interfaces include damaging ESD and
transient events which occur during manufacturing and
assembly, by vehicle occupants or other electrical circuits
in the vehicle. The major documents discussing ESD and
transient events as far as road vehicles are concerned are
ISO 10605 (Road vehicles − Test methods for electrical
disturbances from electrostatic discharge) which describes
ESD test methods and ISO 7637 (Road vehicles − Electrical
disturbances from conduction and coupling) for effects
caused by other electronics in the vehicle. IS0 10605 is
based on IEC 61000−4−2 Industry Standard, which
specifies the various levels of ESD signal characteristics,
but also includes additional vehicle−specific requirements.
Further, OEM specific test requirements are usually also
imposed. In addition, these high speed signal pairs require
protection from short−to−battery (which goes up to
16 VDC) and short−to−ground faults.
A suitable protection solution must satisfy well known
constraints, such as low capacitive loading of the signal
lines to minimize signal attenuation, and also respond
quickly to surges and transients with low clamping voltage.
In addition, small package sizes help to minimize demand
for board−space while providing the ability to route the
trace signals with minimal bending to maintain signal
integrity.
PCB Layout Guidelines
It is optional to route both pins 4 & 6 to their respective
belly pads with a top metal trace as both pins are internally
connected respectively. Also, steps must be taken for
proper placement and signal trace routing of the ESD
protection device in order to ensure the maximum ESD
survivability and signal integrity for the application. Such
steps are listed below.
• Place the ESD protection device as close as possible to
the I/O connector to reduce the ESD path to ground
and improve the protection performance.
• Make sure to use differential design methodology and
impedance matching of all high speed signal traces.
♦ Use curved traces when possible to avoid unwanted
reflections.
♦ Keep the trace lengths equal between the positive
and negative lines of the differential data lanes to
avoid common mode noise generation and
impedance mismatch.
♦ Place grounds between high speed pairs and keep
as much distance between pairs as possible to
reduce crosstalk.
Modes of Operation
There are two distinct modes of operation of the
NIV1161: normal (steady state) and short−to−battery
event. The below describes each of these in more detail.
Normal Operation (Steady State)
In normal operation, the MOSFETs operate in linear
mode, with all source and drain voltages nearly equal,
passing the signal levels effectively from the USB
transceiver. To ensure successful link communication, the
applied gate voltage must be greater than the maximum
signal level from the data line plus the maximum threshold
voltage of the MOSFET device. Due to the NIV1161’s low
of 1.5 V, both 3.3 and 5 V gate drives are suitable to provide
headroom for most communication protocols. The net
effect of the 1 kW pull−up resistor on the MOSFET gate to
the source effectively level−shifts the common mode
voltage on the individual data lines up to the gate voltage.
This action is cancelled out when an appropriate NIV1161
is used on the opposite side of the data line to level−shift the
common−mode voltage back down to levels appropriate
for the reader. If a NIV1161 is not used on the opposite side
of the data line, the pull−up resistor may either not be
populated or populated with high value resistor (15 kW+);
differential data signal integrity is maintained.
Short−to−Battery (STB) Event
While the NIV1161 and data channel are off, one pair of
MOSFET body diodes passively protects the USB
transceiver’s ports. While the data channel is on during an
event, the NIV1161 actively uses the internal MOSFETs to
clamp in a manner akin to level−shifting as the MOSFET
operates in the saturation region. The source node will
increase to a threshold voltage minus a working below the
gate voltage thus allowing current to flow into the data port
impedance until the gate−source voltage comes to rest just
above the threshold voltage. In this way, the NIV1161
protects the data port by limiting the termination current as
well as voltage clamping the data port itself.
