MAX1644EAE-T

Synchronous Rectification
In a step-down regulator without synchronous rectifica-
tion, an external Schottky diode provides a path for cur-
rent to flow when the inductor is discharging. Replacing
the Schottky diode with a low-resistance NMOS syn-
chronous switch reduces conduction losses and
improves efficiency.
The NMOS synchronous-rectifier switch turns on follow-
ing a short delay after the PMOS power switch turns off,
thus preventing cross conduction or “shoot through.” In
constant-off-time mode, the synchronous-rectifier
switch turns off just prior to the PMOS power switch
turning on. While both switches are off, inductor current
flows through the internal body diode of the NMOS
switch. The internal body diode’s forward voltage is rel-
atively high.
Thermal Resistance
Junction-to-ambient thermal resistance, θ
JA
, is highly
dependent on the amount of copper area immediately
surrounding the IC leads. The MAX1644 evaluation kit
has 0.5 in.
2
of copper area and a thermal resistance of
60°C/W with no airflow. Airflow over the IC significantly
reduces the junction-to-ambient thermal resistance. For
heatsinking purposes, evenly distribute the copper area
connected at the IC among the high-current pins.
Power Dissipation
Power dissipation in the MAX1644 is dominated by
conduction losses in the two internal power switches.
Power dissipation due to supply current in the control
section and average current used to charge and dis-
charge the gate capacitance of the internal switches
are less than 30mW at 300kHz. This number is reduced
when the switching frequency decreases as the part
enters Idle Mode. Combined conduction losses in the
two power switches are approximated by:
P
D
= I
OUT
2
· R
ON
The junction-to-ambient thermal resistance required to
dissipate this amount of power is calculated by:
θ
JA
= (T
J,MAX
- T
A,MAX
) / P
D
where: θ
JA
= junction-to-ambient thermal resistance
T
J,MAX
= maximum junction temperature
T
A,MAX
= maximum ambient temperature
MAX1644
2A, Low-Voltage, Step-Down Regulator with
Synchronous Rectification and Internal Switches
_______________________________________________________________________________________ 7
MAX1644
V
CC
470pF
2.2μF
1μF
10μF
10Ω
FBSEL
0.01μF
FEEDBACK
SELECTION
CURRENT
SENSE
PWM LOGIC
AND
DRIVERS
SS
IN
FB
V
IN
3.0V TO 5.5V
LX
PGNDTOFF
R
TOFF
GND
NOTE: HEAVY LINES DENOTE HIGH-CURRENT PATHS.
REF
REF
SUMMING
COMPARATOR
REF
REF
COMP
SKIP
SHDN
TIMER
V
IN
CURRENT
SENSE
G
m
C
OUT
V
OUT
Figure 1. Functional Diagram
MAX1644
__________________Design Procedure
For typical applications, use the recommended compo-
nent values in Table 1. For other applications, take the
following steps:
1) Select the desired PWM-mode switching frequency;
300kHz is a good starting point.
2) Select the constant-off-time as a function of input
voltage, output voltage, and switching frequency.
3) Select R
TOFF
as a function of off-time.
4) Select the inductor as a function of output voltage,
off-time, and peak-to-peak inductor current.
Setting the Output Voltage
The output of the MAX1644 is selectable between one
of two preset output voltages: (2.5V or 3.3V) with a 2%
AC load-regulation error, or an adjustable output volt-
age from the reference voltage (nominally 1.1V) up to
V
IN
with a 1% or 2% AC load-regulation error. For a
preset output voltage, connect FB to the output voltage,
and connect FBSEL to V
CC
(2.5V output voltage) or
leave unconnected (3.3V output voltage). Internal resis-
tor-dividers divide down the output voltage, regulating
the divided voltage to the internal reference voltage.
For output voltages other than 2.5V or 3.3V, or for
tighter AC load regulation, connect FBSEL to GND (1%
regulation) or to REF (2% regulation), and connect FB
to a resistor divider between the output voltage and
ground (Figure 2). Regulation is maintained for
adjustable output voltages when V
FB
equals V
REF
. Use
50kΩ for R1. R2 is given by the equation:
where V
REF
is typically 1.1V.
Programming the Switching Frequency
and Off-Time
The MAX1644 features a programmable PWM mode
switching frequency, which is set by the input and out-
put voltage and the value of R
TOFF
, connected from
TOFF to GND. R
TOFF
sets the PMOS power switch off-
time in PWM mode. Use the following equation to select
the off-time according to your desired switching fre-
quency in PWM mode (I
OUT
> 0.2A):
where: t
OFF
= the programmed off-time
V
IN
= the input voltage
V
OUT
= the output voltage
V
NMOS
= the voltage drop across the internal
PMOS power switch
V
PMOS
= the voltage drop across the internal
NMOS synchronous-rectifier switch
t
VV V
fVV V
OFF
IN OUT PMOS
PWM IN PMOS NMOS
=
()
−+
()
R2 R1
V
V
1
OUT
REF
=−
2A, Low-Voltage, Step-Down Regulator with
Synchronous Rectification and Internal Switches
8 _______________________________________________________________________________________
V
OUT
(V)
R
TOFF
(kΩ)
6.0 120
L
H)
5 3.3
6.8
V
IN
(V)
180
6.8 2405 1.8
3.3 823.3 2.5
4.7 1803.3 1.8
4.7 2003.3 1.5
5 2.5
Table 2. Output Voltage and AC Load-
Regulation Selection
PIN
2.5 2V
CC
Output
Voltage
3.3 2
Adjustable 2REF
Resistor
Divider
Adjustable 1GND
Resistor
Divider
Unconnected
Output
Voltage
FB
AC LOAD-
REGULATION
ERROR (%)
OUTPUT
VOLTAGE
(V)
FBSEL
LX
R2
R1
R1 = 50kΩ
R2 = R1(V
OUT
/ V
REF
- 1)
V
REF
= 1.1V
FB
V
OUT
MAX1644
Figure 2. Adjustable Output Voltage
Table 1. Recommended Component
Values (I
OUT
= 2A, f
PWM
= 300kHz)
6.0 2705 1.5
f
PWM
= switching frequency in PWM mode
(I
OUT
> 0.2A)
Select R
TOFF
according to the formula:
R
TOFF
= (t
OFF
- 0.07µs) (150kΩ / 1.26µs)
Recommended values for R
TOFF
range from 39kΩ to
470kΩ for off-times of 0.4µs to 4µs.
Inductor Selection
Three key inductor parameters must be specified:
inductor value (L), peak current (I
PEAK
), and DC resis-
tance (R
DC
). The following equation includes a con-
stant, denoted as LIR, which is the ratio of peak-
to-peak inductor AC current (ripple current) to maxi-
mum DC load current. A higher value of LIR allows
smaller inductance but results in higher losses and rip-
ple. A good compromise between size and losses is
found at approximately a 25% ripple-current to load-
current ratio (LIR = 0.25), which corresponds to a peak
inductor current 1.125 times higher than the DC load
current:
where: I
OUT
= maximum DC load current
LIR = ratio of peak-to-peak AC inductor current
to DC load current, typically 0.25
The peak inductor current at full load is 1.125 · I
OUT
if
the above equation is used; otherwise, the peak current
is calculated by:
Choose an inductor with a saturation current at least as
high as the peak inductor current. To minimize loss,
choose an inductor with a low DC resistance.
Capacitor Selection
The input filter capacitor reduces peak currents and
noise at the voltage source. Use a low-ESR and low-
ESL capacitor located no further than 5mm from IN.
Select the input capacitor according to the RMS input
ripple-current requirements and voltage rating:
The output filter capacitor affects the output voltage rip-
ple, output load-transient response, and feedback loop
stability. For stable operation, the MAX1644 requires a
minimum output ripple voltage of V
RIPPLE
2% · V
OUT
(with 2% load regulation setting).
The minimum ESR of the output capacitor should be:
Stable operation requires the correct output filter
capacitor. When choosing the output capacitor, ensure
that:
C
OUT
(t
OFF
/ V
OUT
)
(64µFV / µs)
With an AC load regulation setting of 1%, the C
OUT
requirement doubles, and the minimum ESR of the out-
put capacitor is halved.
Integrator Amplifier
An internal transconductance amplifier fine tunes the
output DC accuracy. A capacitor, C
COMP
, from COMP
to V
CC
compensates the transconductance amplifier.
For stability, choose:
C
COMP
470pF
A large capacitor value maintains a constant average
output voltage but slows the loop response to changes
in output voltage. A small capacitor value speeds up
the loop response to changes in output voltage but
decreases stability. Choose the capacitor values that
result in optimal performance.
Setting the AC Loop Gain
The MAX1644 allows selection of a 1% or 2% AC load-
regulation error when the adjustable output voltage
mode is selected (Table 2). A 2% setting is automati-
cally selected in preset output voltage mode (FBSEL
connected to V
CC
or unconnected). A 2% load-regula-
tion error setting reduces output filter capacitor require-
ments, allowing the use of smaller and less expensive
capacitors. Selecting a 1% load-regulation error
reduces transient load errors, but requires larger capac-
itors.
ESR
L
t
OFF
% 1
II
VV V
V
RIPPLE LOAD
OUT IN OUT
IN
=
()
II
Vt
L
PEAK OUT
OUT OFF
=+
×
×2
L
Vt
I LIR
OUT OFF
OUT
=
×
×
MAX1644
2A, Low-Voltage, Step-Down Regulator with
Synchronous Rectification and Internal Switches
_______________________________________________________________________________________ 9

MAX1644EAE-T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
IC REG BUCK ADJ/PROG 2A 16SSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet