HEF4040B_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 4 April 2013 6 of 13
NXP Semiconductors
HEF4040B-Q100
12-stage binary ripple counter
10. Dynamic characteristics
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C
L
in pF).
[2] For loads other than 50 pF at the n
th
output, use the slope given.
[3] t
t
is the same as t
THL
and t
TLH
.
Table 6. Dynamic characteristics
V
SS
= 0 V; T
amb
= 25
C; unless otherwise specified; for test circuit see Figure 6.
Symbol Parameter Conditions V
DD
Extrapolation formula
[1]
Min Typ Max Unit
t
PHL
HIGH to LOW
propagation delay
CP Q0
see Figure 5
5 V 78 ns + (0.55 ns/pF)C
L
- 105 210 ns
10 V 34 ns + (0.23 ns/pF)C
L
-4590ns
15 V 27 ns + (0.16 ns/pF)C
L
-3570ns
Qn Qn + 1 5 V
[2]
(0.55 ns/pF)C
L
-3570ns
10 V
[2]
(0.23 ns/pF)C
L
-1530ns
15 V
[2]
(0.16 ns/pF)C
L
-1020ns
MR Qn
see Figure 5
5 V 63 ns + (0.55 ns/pF)C
L
- 90 180 ns
10 V 29 ns + (0.23 ns/pF)C
L
-4080ns
15 V 22 ns + (0.16 ns/pF)C
L
-3060ns
t
PLH
LOW to HIGH
propagation delay
CP Q0
see Figure 5
5 V 58 ns + (0.55 ns/pF)C
L
- 85 170 ns
10 V 29 ns + (0.23 ns/pF)C
L
-4080ns
15 V 22 ns + (0.16 ns/pF)C
L
-3060ns
Qn Qn + 1 5 V
[2]
(0.55 ns/pF)C
L
-3570ns
10 V
[2]
(0.23 ns/pF)C
L
-1530ns
15 V
[2]
(0.16 ns/pF)C
L
-1020ns
t
t
transition time see Figure 5 5 V
[3]
10 ns + (1.00 ns/pF)C
L
- 60 120 ns
10 V 9 ns + (0.42 ns/pF)C
L
-3060ns
15 V 6 ns + (0.28 ns/pF)C
L
-2040ns
t
W
pulse width CP input HIGH;
minimum width;
see Figure 5
5 V 50 25 - ns
10 V 30 15 - ns
15 V 20 10 - ns
MR input HIGH;
minimum width;
see Figure 5
5 V 40 20 - ns
10 V 30 15 - ns
15 V 20 10 - ns
t
rec
recovery time MR input;
see Figure 5
5 V 40 20 - ns
10 V 30 15 - ns
15 V 20 10 - ns
f
max
maximum
frequency
CP input;
see Figure 5
5 V 10 20 - MHz
10 V 15 30 - MHz
15 V 25 50 - MHz
