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SI51214-A01AFM

P1-P3P4-P6P7-P9P10-P12P13-P15
3. Electrical Specifications
Table 3.1. DC Electrical Specifications
(V
DD
= 1.8 V ±5%, C
L
= 10 pF, T
A
= –40 to 85 °C)
Parameter Symbol Test Condition Min Typ Max Unit
Operating Voltage V
DD
V
DD
= 1.8 V ± 5% 1.71 1.8 1.89 V
Output High Voltage V
OH
I
OH
= –4 mA V
DD
– 0.5 — — V
Output Low Voltage V
OL
I
OL
= 4 mA — — 0.3 V
Input High Voltage V
IH
CMOS Level 0.7 V
DD
— — V
Input Low Voltage V
IL
CMOS Level 0 — 0.3 V
DD
V
Operating Supply Current
1
I
DD
F
IN
= 12 MHz, SSCLK1 = 12 MHz,
SSCLK2 = 24 MHz, C
L
= 5 pF, V
DD
= 1.8 V
— 5.5 9 mA
Power Down Current IDD
PD
— 0.5 0.65 mA
Nominal Output Impedance Z
O
— 30 — Ω
Internal Pull-up/Pull-down Resistor R
PUP
/R
PD
Pin 5 — 150k — Ω
Input Pin Capacitance C
IN
Input pin capacitance — 3 5 pF
Load Capacitance C
L
Clock outputs — — 10 pF
Note:
1. I
DD
depends on input and output frequency configurations.
Table 3.2. AC Electrical Specifications
(V
DD
= 1.8 V ±5%, C
L
= 10 pF, T
A
= –40 to 85 °C)
Parameter Symbol Condition Min Typ Max Unit
Input Frequency Range F
IN1
Crystal input 8 — 48 MHz
Input Frequency Range F
IN2
Reference clock Input 3 — 165 MHz
Output Frequency Range F
OUT
SSCLK1/2 3 — 133 MHz
Frequency Accuracy F
ACC
Configuration dependent — 0 — ppm
Output Duty Cycle DC
OUT
Measured at V
DDO
/2
F
OUT
< 75 MHz
45 50 55 %
Measured at V
DDO
/2
F
OUT
> 75 MHz
40 50 60 %
Input Duty Cycle DC
IN
CLKIN, CLKOUT through PLL 30 50 70 %
Output Rise/Fall Time t
r
/t
f
C
L
= 10 pF, 20 to 80% — 1 2 ns
Si51214 Data Sheet
Electrical Specifications
silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 3
Parameter Symbol Condition Min Typ Max Unit
Period Jitter PJ
1
SSCLK1/2, at the same frequency — 15 30 ps rms
PJ
2
SSCLK1/2, at different output fre-
quencies
1
— 35
105
2
ps rms
Cycle-to-Cycle Jitter CCJ
1
SSCLK1/2, at the same frequency — 100 200 ps
CCJ
2
SSCLK1/2, at different output fre-
quencies
1
— 150
305
2
ps
Power-up Time t
PU
Time from 0.9 V
DD
to valid
frequencies at all clock outputs
— 1.2 5 ms
Output Enable Time t
OE
Time from OE rising edge to active
at outputs SSCLK1/2 (asynchro-
nous), F
OUT
= 133 MHz
— 15 — ns
Output Disable Time t
OD
Time from OE falling edge to active
at outputs SSCLK1/2 (asynchro-
nous), F
OUT
= 133 MHz
— 15 — ns
Spread Spectrum Modulation Rate
3
SS
DEV
— 37 — kHz
Note:
1. Example frequency configurations:
• 100 MHz, 75 MHz
• 100 MHz, 66 2/3 MHz
• 96 MHz, 133 1/3 MHz
2. Jitter performance depends on configuration and programming parameters.
3. The SS modulation rate is a fixed ratio of the reference frequency with values in the range of 30 kHz to 50 kHz based on the
frequency plan.
Table 3.3. Absolute Maximum Conditions
Parameter Symbol Condition Min Typ Max Unit
Main Supply Voltage V
DD
–0.5 — 2.4 V
Input Voltage V
IN
Relative to V
SS
–0.5 — V
DD
+0.5 V
Temperature, Storage T
S
Non-functional –65 — 150 °C
Temperature, Operating Ambient T
A
Functional, I-temp –40 — 85 °C
ESD Protection (Human Body Mod-
el)
ESD
HBM
JEDEC (JESD 22-A114) –4000 — 4000 V
ESD Protection (Charge Device
Model)
ESD
CDM
JEDEC (JESD 22-C101) –1500 — 1500 V
ESD Protection (Machine Model) ESD
MM
JEDEC (JESD 22-A115) –200 — 200 V
Si51214 Data Sheet
Electrical Specifications
silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 4
4. Functional Description
4.1 Input Frequency Range
The input frequency range is from 8.0 to 48.0 MHz for crystals and ceramic resonators. If an external clock is used, the input frequency
range is from 3.0 to 165.0 MHz.
4.2 Output Frequency Range and Outputs
Up to two outputs can be programmed as SSCLK or REFCLK. SSCLK output can be synthesized to any value from 3 to 133 MHz with
spread based on valid input frequency. The spread at the SSCLK pins can be enabled or disabled by the SSONb input control pin. If
SSONb is used, when this pin is pulled high (V
DD
), the frequency at SSCLK pin is synthesized to the nominal value of the input fre-
quency without spread. If low (GND), the frequency at SSCLK is synthesized to the nominal value of the input frequency with spread..
REFCLK is the buffered output of the oscillator and is the same frequency as the input frequency without spread. By using only low
cost, fundamental mode crystals, the Si51214 can synthesize output frequency up to 133 MHz, eliminating the need for higher order
crystals (Xtals) and crystal oscillators (XOs). This reduces the cost while improving the system clock accuracy, performance, and relia-
bility.
4.3 Programmable Spread Percent (%)
The spread percent (%) value is programmable to ±0.25%, ±0.5% or ±1% (center spread) for all SSCLK frequencies.
4.4 SSONb or Frequency Select (FSEL)
The Si51214 pins 4 and 5 can be programmed as SSONb to enable or disable the programmed spread percent value. If SSONb is
used, when this pin is pulled high (V
DD
),the frequency at SSCLK pin is synthesized to the nominal value of the input frequency without
spread. If low (GND), the frequency at SSCLK is synthesized to the nominal value of the input frequency with spread. Pin 4 can also be
programmed as frequency select (FSEL) function.
If FSEL function is used, the output pin can be programmed for different set of frequencies as selected by FSEL. SSCLK value can be
any frequency from 3 to up to 133 MHz, but the spread % is the same percent value. REFCLK is the same frequency as the input
reference clock. The set of frequencies in the table below are given as an example, using a 48 MHz crystal.
Table 4.1. Example Frequencies
FSEL
Pin 4
SSCLK1
Pin 5
0 66 MHz, ±1%
1 33 MHz, ±1%
4.5 Power Down (PD) or Output Enable (OE)
The Si51214 pin 5 can be programmed as PD input. Pin 4 and pin 5 can be programmed as OE input. PD turns off both PLL and output
buffers whereas OE only disables the output buffers to Hi-Z. The OE function is asynchronous. Any requirement for synchronous opera-
tions (like glitchless output clock switching) needs to be handled externally.
Si51214 Data Sheet
Functional Description
silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 5
P1-P3P4-P6P7-P9P10-P12P13-P15

SI51214-A01AFM

Mfr. #:
Buy SI51214-A01AFM
Manufacturer:
Silicon Labs
Description:
Clock Generators & Support Products 2-output Programmable Clock Generator
Lifecycle:
New from this manufacturer.
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