LM2576
http://onsemi.com
20
Figure 29. Inverting Buck−Boost Regulator Shutdow
Circuit Using a PNP Transistor
NOTE: This picture does not show the complete circuit.
R2
5.6 k
Q1
2N3906
LM2576−XX
1
35GN
D
ON/OFF
R1
12 k
−V
out
+V
in
Shutdown
Input
Off
On
+V
0
+V
in
C
in
100 mF
Negative Boost Regulator
This example is a variation of the buck−boost topology
and it is called negative boost regulator. This regulator
experiences relatively high switch current, especially at low
input voltages. The internal switch current limiting results in
lower output load current capability.
The circuit in Figure 30 shows the negative boost
configuration. The input voltage in this application ranges
from −5.0 V to −12 V and provides a regulated −12 V output.
If the input voltage is greater than −12 V, the output will rise
above −12 V accordingly, but will not damage the regulator.
Figure 30. Negative Boost Regulator
1N5820
100 mH
Output
2
4
Feedback
V
out
= −12 V
Typical Load Current
400 mA for V
in
= −5.2 V
750 mA for V
in
= −7.0 V
−5.0 V to −12 V
C
out
2200 mF
Low Esr
C
in
100 mF
LM2576−12
1
53
ON/OFFGND
V
in
V
in
Design Recommendations:
The same design rules as for the previous inverting
buck−boost converter can be applied. The output capacitor
C
out
must be chosen larger than would be required for a what
standard buck converter. Low input voltages or high output
currents require a large value output capacitor (in the range
of thousands of mF). The recommended range of inductor
values for the negative boost regulator is the same as for
inverting converter design.
Another important point is that these negative boost
converters cannot provide current limiting load protection in
the event of a short in the output so some other means, such
as a fuse, may be necessary to provide the load protection.
Delayed Startup
There are some applications, like the inverting regulator
already mentioned above, which require a higher amount of
startup current. In such cases, if the input power source is
limited, this delayed startup feature becomes very useful.
To provide a time delay between the time when the input
voltage is applied and the time when the output voltage
comes up, the circuit in Figure 31 can be used. As the input
voltage is applied, the capacitor C1 charges up, and the
voltage across the resistor R2 falls down. When the voltage
on the ON/OFF pin falls below the threshold value 1.3 V, the
regulator starts up. Resistor R1 is included to limit the
maximum voltage applied to the ON/OFF pin. It reduces the
power supply noise sensitivity, and also limits the capacitor
C1 discharge current, but its use is not mandatory.
When a high 50 Hz or 60 Hz (100 Hz or 120 Hz
respectively) ripple voltage exists, a long delay time can
cause some problems by coupling the ripple into the
ON/OFF pin, the regulator could be switched periodically
on and off with the line (or double) frequency.
Figure 31. Delayed Startup Circuitry
R1
47 k
LM2576−XX
1
35GN
D
ON/OFF
R2
47 k
+V
in
+V
in
C1
0.1 mF
C
in
100 mF
NOTE: This picture does not show the complete circuit.
Undervoltage Lockout
Some applications require the regulator to remain off until
the input voltage reaches a certain threshold level. Figure 32
shows an undervoltage lockout circuit applied to a buck
regulator. A version of this circuit for buck−boost converter
is shown in Figure 33. Resistor R3 pulls the ON/OFF pin
high and keeps the regulator off until the input voltage
reaches a predetermined threshold level with respect to the
ground Pin 3, which is determined by the following
expression:
V
th
[ V
Z1
)
ǒ
1.0 )
R2
R1
Ǔ
V
BE
(
Q1
)
