MAXQ7670
Microcontroller with 10-Bit ADC,
PGA, 64KB Flash, and CAN Interface
______________________________________________________________________________________ 31
REGISTER BIT
REGISTER
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
AP (4 Bits)
AP
00000000
CLR IDS MOD2 MOD1 MOD0
APC
00000000
Z S GPF1 GPF0 OV C E
PSF
10000000
CGDS INS IGE
IC
00000000
IMS IM5 IM4 IM3 IM2 IM1 IM0
IMR
00000000
TAP CDA1 CDA0 UPA ROD PWL
SC
100000s*0
IIS II5 II4 II3 II2 II1 II0
IIR
00000000
XT RGMD STOP SWB PMME CD1 CD0
CKCN
s* 0 s* 0 0 0 0 1
POR EWDI WD1 WD0 WDIF WTRF EWT RWT
WDCN
s* s* 0 0 0 s* s* 0
A[n] (16 Bits)
A[n] (0..15)
0000000000 0 00 0 0 0
PFX[n] (16 Bits)
PFX[n] (0..15)
0000000000 0 00 0 0 0
IP (16 Bits)
IP
1000000000 0 00 0 0 0
———————— — SP (4 Bits)
SP
0000000000 0 01 1 1 1
IV (16 Bits)
IV
0000000000 0 00 0 0 0
LC[0] (16 Bits)
LC[0]
0000000000 0 00 0 0 0
LC[1] (16 Bits)
LC[1]
0000000000 0 00 0 0 0
OFFS (8 Bits)
OFFS
00000000
———————— WBS2 WBS1 WBS0 SDPS1 SDPS0
DPC
0000000000 0 11 1 0 0
GR.15 GR.14 GR.13 GR.12 GR.11 GR.10 GR.9 GR.8 GR.7 GR.6 GR.5 GR.4 GR.3 GR.2 GR.1 GR.0
GR
0000000000 0 00 0 0 0
GR.7 GR.6 GR.5 GR.4 GR.3 GR.2 GR.1 GR.0
GRL
00000000
BP (16 Bits)
BP
0000000000 0 00 0 0 0
GR.7 GR.6 GR.5 GR.4 GR.3 GR.2 GR.1 GR.0 GR.15 GR.14 GR.13 GR.12 GR.11 GR.10 GR.9 GR.8
GRS
0000000000 0 00 0 0 0
GR.15 GR.14 GR.13 GR.12 GR.11 GR.10 GR.9 GR.8
GRH
00000000
GR.7 GR.7 GR.7 GR.7 GR.7 GR.7 GR.7 GR.7 GR.7 GR.6 GR.5 GR.4 GR.3 GR.2 GR.1 GR.0
GRXL
0000000000 0 00 0 0 0
FP (16 Bits)
FP
0000000000 0 00 0 0 0
DP[0] (16 Bits)
DP[0]
0000000000 0 00 0 0 0
DP[1] (16 Bits)
DP[1]
0000000000 0 00 0 0 0
Table 3. System Register Bit and Reset Values
*Bits indicated by an "s" are only affected by a POR and not by other forms of reset. These bits are set to 0 after a POR. Refer to the
MAXQ7670 User’s Guide
for more information.
MAXQ7670
Microcontroller with 10-Bit ADC,
PGA, 64KB Flash, and CAN Interface
32 ______________________________________________________________________________________
REGISTER
INDEX
M0 (0h) M1 (1h) M2 (2h) M3 (3h) M4 (4h) M5 (5h)
0h PO0 T2CNA0 C0C
1h T2HO C0S APE
2h T2RHO COIR ACNTL
3h EIFO T2CHO C0TE
4h————C0RE
5h————C0R
6h SPIB C0DP
7h SPICN C0DB
8h PI0 SPICF T2CNBO C0RMS ADCD
9h SPICK T2VO C0TMA
Ah FCNTL T2RO AIE
Bh EIEO T2CO ASR
Ch—————OSCC
Dh——————
Eh——————
Fh——————
10h PD0 T2CFG0
11h FPCTL
C0M1C
12h————C0M2C
13h EIESO C0M3C
14h————C0M4C
15h————C0M5C
16h————C0M6C
17h————C0M7C
18h PS0 ICDT0 C0M8C
19h ICDT1 C0M9C
1Ah ICDC C0M10C
1Bh PRO ICDF C0M11C
1Ch ID0 ICDB C0M12C
1Dh ICDA C0M13C
1Eh ICDD C0M14C
1Fh TM C0M15C
Table 4. Peripheral Register Map
MAXQ7670
Microcontroller with 10-Bit ADC,
PGA, 64KB Flash, and CAN Interface
______________________________________________________________________________________ 33
REGISTER BIT
REGISTER
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PO0.7 PO0.6 PO0.5 PO0.4 PO0.2 PO0.1 PO0.0
PO0
0 0 0 0 0 0 0 011 1 101 1 1
IE7 IE6 IE5 IE4 IE2 IE1 IE0
EIF0
0 0 0 0 0 0 0 000 0 000 0 0
PI0.7 PI0.6 PI0.5 PI0.4 PI0.2 PI0.1 PI0.0
PI0
0 0 0 0 0 0 0 0 ST ST ST ST 0 ST ST ST
EX7 EX6 EX5 EX4 EX2 EX1 EX0
EIE0
0 0 0 0 0 0 0 0 00 0 000 0 0
PD0.7 PD0.6 PD0.5 PD0.4 PD0.2 PDO.1 PD0.0
PD0
0 0 0 0 0 0 0 0 00 0 000 0 0
IT7 IT6 IT5 IT4 IT2 IT1 IT0
EIES0
0 0 0 0 0 0 0 000 0 000 0 0
PS7 PS6 PS5 PS4 PS2 PS1 PS0
PS0
0 0 0 0 0 0 0 000 0 000 0 0
PR7 PR6 PR5 PR4 PR2 PR1 PR0
PR0
0 0 0 0 0 0 0 000 0 000 0 0
SPIB.15 SPIB.14 SPIB.13 SPIB.12 SPIB.11 SPIB.10 SPIB.9 SPIB.8 SPIB.7 SPIB.6 SPIB.5 SPIB.4 SPIB.3 SPIB.2 SPIB.1 SPIB.0
SPIB
0 0 0 0 0 0 0 0 00 0 000 0 0
STBY SPIC ROVR WCOL MODF MODFE MSTM SPIEN
SPICN
0 0 0 0 0 0 0 0 00 0 000 0 0
ESPII CHR CKPHA CKPOL
SPICF
0 0 0 0 0 0 0 0 00 0 000 0 0
SPICK7 SPICK6 SPICK5 SPICK4 SPICK3 SPICK2 SPICK1 SPICK0
SPICK
0 0 0 0 0 0 0 000 0 000 0 0
FBUSY FC2 FC1 FC0
FCNTL
0 0 0 0 0 0 0 010 0 000 0 0
DPMG
FPCTL
0 0 0 0 0 0 0 000 0 000 0 0
ID0.7 ID0.6 ID0.5 ID0.4 ID0.3 ID0.2 ID0.1 ID0.0
ID0
0 0 0 0 0 0 0 0 00 0 000 0 0
ET2 T2OE0 T2POL0 TR2L TR2 CPRL2 SS2 G2EN
T2CNA0
0 0 0 0 0 0 0 0 00 0 000 0 0
T2H0.7 T2H0.6 T2H0.5 T2H0.4 T2H0.3 T2H0.2 T2H0.1 T2H0.0
T2H0
0 0 0 0 0 0 0 0 00 0 000 0 0
T2RH0.7 T2RH0.6 T2RH0.5 T2RH0.4 T2RH0.3 T2RH0.2 T2RH0.1 T2RH0.0
T2RH0
0 0 0 0 0 0 0 000 0 000 0 0
T2CH0.7 T2CH0.6 T2CH0.5 T2CH0.4 T2CH0.3 T2CH0.2 T2CH0.1 T2CH0.0
T2CH0
0 0 0 0 0 0 0 000 0 000 0 0
ET2L T2OE1 T2POL1 TF2 TF2L TCC2 TC2L
T2CNB0
0 0 0 0 0 0 0 000 0 000 0 0
T2V0.15 T2V0.14 T2V0.13 T2V0.12 T2V0.11 T2V0.10 T2V0.9 T2V0.8 T2V0.7 T2V0.6 T2V0.5 T2V0.4 T2V0.3 T2V0.2 T2V0.1 T2V0.0
T2V0
0 0 0 0 0 0 0 0 00 0 000 0 0
T2R0.15 T2R0.14 T2R0.13 T2R0.12 T2R0.11 T2R0.10 T2R0.9 T2R0.8 T2R0.7 T2R0.6 T2R0.5 T2R0.4 T2R0.3 T2R0.2 T2R0.1 T2R0.0
T2R0
0 0 0 0 0 0 0 0 00 0 000 0 0
T2C0.15 T2C0.14 T2C0.13 T2C0.12 T2C0.11 T2C0.10 T2C0.9 T2C0.8 T2C0.7 T2C0.6 T2C0.5 T2C0.4 T2C0.3 T2C0.2 T2C0.1 T2C0.0
T2C0
0 0 0 0 0 0 0 0 00 0 000 0 0
——————T2C1 T2DIV2 T2DIV1 T2DIV0 T2MD CCF1 CCF0 C/T2
T2CFG0
00000000000000 0 0
ICDT0.15 ICDT0.14 ICDT0.13 ICDT0.12 ICDT0.11 ICDT0.10 ICDT0.9 ICDT0.8 ICDT0.7 ICDT0.6 ICDT0.5 ICDT0.4 ICDT0.3 ICDT0.2 ICDT0.1 ICDT0.0
ICDT0
DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB
ICDT1.15 ICDT1.14 ICDT1.13 ICDT1.12 ICDT1.11 ICDT1.10 ICDT1.9 ICDT1.8 ICDT1.7 ICDT1.6 ICDT1.5 ICDT1.4 ICDT1.3 ICDT1.2 ICDT1.1 ICDT1.0
ICDT1
DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB
DME REGE CMD3 CMD2 CMD1 CMD0
ICDC
0 0 0 0 0 0 0 0 DW 0 DW 0 DW DW DW DW
——————PSS1 PSS0 SPE TXC
ICDF
00000000000000 0 0
——————ICDB.7ICDB.6ICDB.5ICDB.4ICDB.3ICDB.2ICDB.1 ICDB.0
ICDB
00000000000000 0 0
ICDA.15 ICDA.14 ICDA.13 ICDA.12 ICDA.11 ICDA.10 ICDA.9 ICDA.8 ICDA.7 ICDA.6 ICDA.5 ICDA.4 ICDA.3 ICDA.2 ICDA.1 ICDA.0
ICDA
00000000000000 0 0
ICDD.15 ICDD.14 ICDD.13 ICDD.12 ICDD.11 ICDD.10 ICDD.9 ICDD.8 ICDD.7 ICDD.6 ICDD.5 ICDD.4 ICDD.3 ICDD.2 ICDD.1 ICDD.0
ICDD
00000000000000 0 0
Table 5. Peripheral Register Bit Functions and Reset Values

MAXQ7670ATL/V+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Lifecycle:
New from this manufacturer.
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