LT4254
11
4254fb
Layout Considerations section for important information
about board layout to minimize current limit threshold
error.
The LT4254 also features a variable overcurrent response
time. The time required for the part to regulate the GATE
pin voltage is a function of the voltage across the sense
resistor connected between the V
CC
pin and the SENSE pin.
This helps to eliminate sensitivity to current spikes and tran-
sients that might otherwise unnecessarily trigger a current
limit response and increase MOSFET dissipation. Figure 8
shows the response time as a function of the overdrive at
the SENSE pin.
TIMER
The TIMER pin provides a method for programming the
maximum time the part is allowed to operate in current
limit. When the current limit circuitry is not active, the
TIMER pin is pulled to GND by a 3µA current source. When
the current limit circuitry becomes active, a 123µA pull-up
current source is added to the TIMER pin and the voltage
will rise with a slope equal to 120µA/C
TIMER
as long as the
circuitry stays active. Once the desired maximum current
limit time is known, the capacitor value is:
C(nF) = 25.8 • t(ms)
Whenever the TIMER pin reaches 4.65V (typ), the internal
fault latch is set causing the GATE to be pulled low and the
TIMER pin to be discharged to GND by the 3µA current
source. The part is not allowed to turn on again until the
voltage at the TIMER pin falls below 0.65V (typ).
The TIMER pin must never be pulled high by a low
impedance because whenever the TIMER pin voltage rises
above the upper threshold (typically 4.65V) the pin char-
acteristics change from a high impedance current source
to a low impedance. If the pin must be pulled high by a logic
signal, then a resistor must be put in series with the TIMER
pin to limit the current to approximately 100 microam-
peres. The resistance should be chosen as follows:
R
SERIES
= (V
LOGIC
– 4.65V)/100µA
Whenever the GATE pin is commanded off by any fault
condition, it is discharged with a high current, turning off
the external MOSFET. The waveform in Figure 9 shows how
the output latches off following a short-circuit. The drop
across the sense resistor is held at 12mV as the timer ramps
up. Since the output did not rise bringing FB above 2V and
the current is still 12mV/R5, the circuit latches off.
Automatic Restart
If the RETRY pin is floating, then the functionality is as
described in the previous section.
When the voltage at the TIMER pin ramps back down to
0.65V (typ), the LT4254 turns on again. If the short-circuit
condition at the output still exists, the cycle will repeat
itself indefinitely. The duty cycle under short-circuit con-
ditions is 3% which prevents Q1 from overheating.
Latch Off Operation
If the RETRY pin is grounded, the LT4254 will latch off
after a current fault. After the part latches off, it may be
APPLICATIO S I FOR ATIO
WUU
U
12mV
0V 2V FB
4254 F07
50mV
V
CC
– V
SENSE
50 100 150 200
4254 F08
12
10
8
6
4
2
RESPONSE TIME (µs)
V
CC
– V
SENSE
(mV)
0
Figure 7. Current Limit Sense Voltage vs Feedback Pin Voltage Figure 8. Response Time to Overcurrent
