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TEA1993TS/1X

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
NXP Semiconductors
TEA1993TS
GreenChip synchronous rectifier controller
TEA1993TS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 1.1 — 14 September 2016
7 / 20
aaa-021190
0
V
CAP
V
G(MAX)
V
CAP
V
G(MAX)
12 V
5 V X V12 V1 V
10 V
9 V
4 V
Figure 4. Maximum gate voltage V
G(max)
During start-up conditions (V
CAP
< V
start(CAP)
) and UVLO, the driver output voltage is
actively pulled low.
8.6 Source sense (SOURCE pin)
The IC is equipped with an additional source sense pin (SOURCE). This pin is used
for measuring the drain-to-source voltage of the external SR MOSFET. The source
sense input must be connected as close as possible to the SOURCE pin of the external
SR MOSFET. It minimizes errors, caused by voltage differences on PCB tracks due to
parasitic inductance in combination with large dI/dt values.
NXP Semiconductors
TEA1993TS
GreenChip synchronous rectifier controller
TEA1993TS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 1.1 — 14 September 2016
8 / 20
9 Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are measured
with respect to ground (pin 2); positive currents flow into the chip. Voltage ratings are valid provided
other ratings are not violated; current ratings are valid provided the other ratings are not violated.
Symbol Parameter Conditions Min Max Unit
Voltages
V
XV
voltage on pin XV −0.4 +38 V
V
sense(DRAIN)
sense voltage on pin DRAIN −0.8 +120 V
V
sense(SOURCE)
sense voltage on pin
SOURCE
−0.4 +0.4 V
Currents
I
XV
current on pin XV peak current - 0.5 A
General
P
tot
total power dissipation T
amb
= 90 °C - 300 mW
T
stg
storage temperature −55 +150 °C
T
j
junction temperature −40 +150 °C
ElectroStatic Discharge (ESD)
class 2
human body
model
[1]
- 2000 V
V
ESD
electrostatic discharge
voltage
charged device
model
- 500 V
[1] Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.
10 Thermal characteristics
Table 5. Thermal characteristics
Symbol Parameter Conditions Typ Unit
R
th(j-a)
thermal resistance from junction to
ambient
JEDEC test board 200 K/W
R
th(j-c)
thermal resistance from junction to
case
JEDEC test board 115 K/W
NXP Semiconductors
TEA1993TS
GreenChip synchronous rectifier controller
TEA1993TS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 1.1 — 14 September 2016
9 / 20
11 Characteristics
Table 6. Characteristics
−25 °C < T
j
< +125 °C; V
xv
= 12 V; C
CAP
= 1 μF; C
GATE
= 10 nF (capacitor between the GATE and the GND pins); all
voltages are measured with respect to ground (pin 2); currents are positive when flowing into the IC; unless otherwise
specified. Limits are production tested at 25 °C. Statistical characterization in the temperature operating range ensure these
limits.
Symbol Parameter Conditions Min Typ Max Unit
Supply voltage management (XV and CAP pins)
V
start(CAP)
start voltage on pin CAP V
XV
= 0 V 3.55 3.70 3.90 V
V
stop(CAP)
stop voltage on pin CAP V
XV
= 0 V 3.45 3.60 3.80 V
V
XV
= 0 V; V
CAP
= 7 V;
V
DRAIN
= 12 V;
T
j
= 25 °C
−95 −70 −50 mAI
ch(CAP)
charge current on pin CAP
V
XV
= 2 V;
V
CAP
= 3.65 V;
V
DRAIN
= 12 V;
T
j
= 25 °C
−95 −70 −50 mA
V
XV
= 0 V; V
DRAIN
= 12 V 8.70 9.20 9.60 V
V
XV
= 2 V; V
DRAIN
= 12 V 3.80 4.00 4.15 V
V
XV
= 5 V 4.15 4.30 4.75 V
V
I(CAP)
input voltage on pin CAP
V
XV
= 12 V 11.0 11.3 11.7 V
power save operation;
V
XV
= 5 V
90 160 250 μAI
I(XV)
input current on pin XV
normal operation;
without gate charge;
V
XV
= 5 V; T
j
= 25 °C
1.35 1.60 1.85 mA
Synchronous rectification sense input (DRAIN and SOURCE pins)
V
reg(drv)
driver regulation voltage V
SOURCE
= 0 V;
T
j
= 25 °C
−40 −37 −35 mV
V
swoff
switch-off voltage V
SOURCE
= 0 V;
T
j
= 25 °C
200 300 400 mV
t
d(act)(drv)
driver activation delay time V
SOURCE
= 0 V;
normal operation;
time for step on V
DRAIN
(2 V to −0.5 V) to
rising of V
GATE
at 10 %
of end value
- 65 - ns
t
d(deact)(drv)
driver deactivation delay time V
SOURCE
= 0 V;
normal operation;
time for step on V
DRAIN
(−0.5 V to 2 V)
to falling of V
GATE
at 10 % begin value
- 40 - ns
t
act(sr)(min)
minimum synchronous rectification
active time
V
XV
= V
CAP
= 5 V;
T
j
= 25 °C
1.20 1.50 1.80 μs
Gate driver (GATE pin)
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

TEA1993TS/1X

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Manufacturer:
NXP Semiconductors
Description:
Power Management Specialized - PMIC GreenChip synchronous rectifier controller
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