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CY7C025E-25AXC

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
CY7C024E
CY7C025E
CY7C0251E
Document Number: 001-62932 Rev. *G Page 22 of 24
Document History Page
Document Title: CY7C024E/CY7C025E/CY7C0251E, 4 K × 16 and 8 K × 16/18 Dual-Port Static RAM with SEM, INT, BUSY
Document Number: 001-62932
Rev. ECN No.
Orig. of
Change
Submission
Date
Description of Change
** 2975554 RAME 07/09/2010 New data sheet.
*A 3056347 ADMU 10/28/2010 Updated Selection Guide:
Changed Typical Operating current (mA) from 180 mA to 170 mA
(corresponding to speed bin -25).
Changed Typical standby current for I
SB1
(mA) from 45 mA to 40 mA
(corresponding to speed bin -25).
Changed Typical Operating current (mA) from 180 mA to 150 mA
(corresponding to speed bin -55).
Changed Typical standby current for I
SB1
(mA) from 45 mA to 20 mA
(corresponding to speed bin -55).
Updated Electrical Characteristics:
Separated values corresponding to speed bins -25 and -55 into two separate
columns.
Changed typical value of I
CC
parameter from 180 mA to 170 mA
(corresponding to speed bin -25 and test condition “Commercial”).
Changed maximum value of I
CC
parameter from 275 mA to 250 mA
(corresponding to speed bin -25 and test condition “Commercial”).
Changed typical value of I
CC
parameter from 180 mA to 150 mA
(corresponding to speed bin -55 and test condition “Commercial”).
Changed maximum value of I
CC
parameter from 275 mA to 230 mA
(corresponding to speed bin -55 and test condition “Commercial”).
Changed typical value of I
SB1
parameter from 45 mA to 40 mA (corresponding
to speed bin -25 and test condition “Commercial”).
Changed maximum value of I
SB1
parameter from 65 mA to 60 mA
(corresponding to speed bin -25 and test condition “Commercial”).
Changed typical value of I
SB1
parameter from 45 mA to 20 mA (corresponding
to speed bin -55 and test condition “Commercial”).
Changed maximum value of I
SB1
parameter from 65 mA to 50 mA
(corresponding to speed bin -55 and test condition “Commercial”).
Changed typical value of I
SB2
parameter from 110 mA to 100 mA
(corresponding to speed bin -25 and test condition “Commercial”).
Changed maximum value of I
SB2
parameter from 160 mA to 150 mA
(corresponding to speed bin -25 and test condition “Commercial”).
Changed typical value of I
SB2
parameter from 110 mA to 75 mA (corresponding
to speed bin -55 and test condition “Commercial”).
Changed maximum value of I
SB2
parameter from 160 mA to 135 mA
(corresponding to speed bin -55 and test condition “Commercial”).
Changed typical value of I
SB4
parameter from 100 mA to 90 mA (corresponding
to speed bin -25 and test condition “Commercial”).
Changed maximum value of I
SB4
parameter from 140 mA to 130 mA
(corresponding to speed bin -25 and test condition “Commercial”).
Changed typical value of I
SB4
parameter from 100 mA to 70 mA (corresponding
to speed bin -55 and test condition “Commercial”).
Changed maximum value of I
SB4
parameter from 140 mA to 120 mA
(corresponding to speed bin -55 and test condition “Commercial”).
Updated Ordering Information:
Updated 4 K × 18 Dual-Port SRAM:
Removed MPN CY7C0241E-55AXI.
*B 3247559 ADMU 05/04/2011 Updated Electrical Characteristics:
Removed minimum value of V
IL
parameter (for all speed bins).
Updated Ordering Code Definitions under Ordering Information.
Updated Package Diagrams.
CY7C024E
CY7C025E
CY7C0251E
Document Number: 001-62932 Rev. *G Page 23 of 24
*C 3864478 ADMU 01/10/2013 Updated Ordering Information (Updated part numbers).
Updated Package Diagrams:
spec 51-85048 – Changed revision from *E to *G.
*D 4075480 ADMU 07/24/2013 Updated Logic Block Diagram.
Updated Pin Configurations.
Updated in new template.
Completing Sunset Review.
*E 4093991 ADMU 08/13/2013 Updated Package Diagrams:
spec 51-85048 – Changed revision from *G to *H.
Added Units of Measure.
*F 4447806 ADMU 07/18/2014 Removed CY7C0241E related information in all instances across the
document.
Updated Ordering Information:
Removed MPN CY7C0241E-25AXC.
Updated Package Diagrams:
spec 51-85048 – Changed revision from *H to *I.
*G 4580426 ADMU 11/24/2014 Added related documentation hyperlink in page 1.
Document History Page (continued)
Document Title: CY7C024E/CY7C025E/CY7C0251E, 4 K × 16 and 8 K × 16/18 Dual-Port Static RAM with SEM, INT, BUSY
Document Number: 001-62932
Rev. ECN No.
Orig. of
Change
Submission
Date
Description of Change
Document Number: 001-62932 Rev. *G Revised November 26, 2014 Page 24 of 24
All products and company names mentioned in this document may be the trademarks of their respective holders.
CY7C024E
CY7C025E
CY7C0251E
© Cypress Semiconductor Corporation, 2010-2014. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of
any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for
medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as
critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems
application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),
United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress
integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without
the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
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CY7C025E-25AXC

Mfr. #:
Buy CY7C025E-25AXC
Manufacturer:
Cypress Semiconductor
Description:
SRAM 128Kb 25ns 8K x 16 Dual Port SRAM
Lifecycle:
New from this manufacturer.
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