AD5626
Rev. A | Page 15 of 20
For the ±2.5 V output range and the circuit values shown in the
table in Figure 31, the transfer equation becomes
V
O
= 1.22 mV × Digital Code − 2.5 V
Similarly, for the 5 V output range, the transfer equation
becomes
V
O
= 2.44 mV × Digital Code − 5 V
GENERATING A NEGATIVE SUPPLY VOLTAGE
Some applications may require bipolar output configuration
but only have a single power supply rail available. This is very
common in data acquisition systems using microprocessor-
based systems. In these systems, only 12 V, 15 V, and/or 5 V
are available.
Figure 32 shows a method for generating a negative supply
voltage using one CD4049, a CMOS hexadecimal inverter, and
operating on 12 V or 15 V. The circuit is essentially a charge
pump where two of the six inverters are used as an oscillator.
For the values shown, the frequency of oscillation is approx-
imately 3.5 kHz and is fairly insensitive to supply voltage
because R1 > 2 × R2.
The remaining four inverters are wired in parallel for higher
output current. The square wave output is level translated by C2
to a negative-going signal rectified using a pair of 1N4001s, and
then filtered by C3. With the values shown, the charge pump
provides an output voltage of −5 V for currents loading in the
range 0.5 mA ≤ I
OUT
≤ 10 mA with a 15 V supply and 0.5 mA ≤
I
OUT
≤ 7 mA with a 12 V supply.
06757-032
7
9
11
14
6
5432
R1
510k
R3
470
D2
1N4001
R2
5.1k
C1
0.02µF
C3
47µF
D1
1N4001
1N5231
5.1V
ZENER
C2
47µF
–5V
INVERTERS = CD4049
10
12
15
+
+
Figure 32. Generating a –5 V Supply When Only 12 V or 15 V Is Available
A SINGLE-SUPPLY, PROGRAMMABLE
CURRENT SOURCE
The circuit in Figure 33 shows how the AD5626 can be used
with an OP295 single-supply, rail-to-rail, output op amp to
provide a digitally programmable current sink from V
SOURCE
that consumes less than 3.8 mA, maximum. The DAC output
voltage is applied across R1 by placing the 2N2222 transistor in
the feedback loop of the OP295. For the circuit values shown,
the full-scale output current is 1 mA, which is given by the
following equation:
R1
D
W
I
OUT
V095.4×
=
where DW = the binary digital input code of the AD5626.
06757-033
CS
CLR
SCLK
LDAC
SDIN
2
8
6
5
3
4
1
7
AD5626
+5V
V
S
2N2222
LOAD
P1
200
R1
4.02k
A1 = 1/2 OP295
FULL-SCALE
ADJUST
0.1µF
5
V
V
DD
A1
2
1
3
+
V
OUT
GND
Figure 33. A Single-Supply, Programmable Current Source
The usable output voltage range of the current sink is 5 V to
60 V. The low limit of the range is controlled by transistor
saturation, and the high limit is controlled by the collector-base
breakdown voltage of the 2N2222.
GALVANICALLY-ISOLATED INTERFACE
In many process control type applications, it is necessary to
provide an isolation barrier between the controller and the unit
being controlled to protect and isolate the controlling circuitry
from any hazardous common-mode voltages that may occur.
An iCoupler® can provide isolation in excess of 2.5 kV. The
serial loading structure of the AD5626 makes it ideal for
isolated interfaces as the number of interface lines is kept to
a minimum. Figure 34 illustrates a 4-channel isolated interface
using an ADuM1400. For further information, visit
http://www.analog.com/icouplers.
ENCODE DECODE
ENCODE DECODE
ENCODE DECODE
V
IA
V
IB
V
IC
V
ID
V
OA
V
OB
V
OC
V
OD
ENCODE DECODE
A
DuM1
4
00*
MICROCONTROLLER
SERIAL CLOCK OUT
SERIAL DATA OUT
SYNC OUT
CONTROL OUT
TO SCLK
TO SDIN
TO SYNC
TO LDAC
*ADDITIONAL PINS OMITTED FOR CLARITY.
06757-034
Figure 34. An iCoupler-Isolated DAC Interface
AD5626
Rev. A | Page 16 of 20
MICROPROCESSOR INTERFACING
AD5626 to MC68HC11 Interface
The circuit illustrated in Figure 35 shows a serial interface
between the AD5626 and the MC68HC11 8-bit microcontroller.
SCK of the MC68HC11 drives SCLK of the AD5626, whereas
the MOSI output drives the serial data line, SDIN, of the AD5626.
The
CLR
,
LDAC
, and
CS
signals of the DAC are derived from
the PC1, PD5, and PC0 port lines, respectively, as shown.
For correct operation of the serial interface, configure the
MC68HC11 such that its CPOL bit is set to 1 and its CPHA bit
is also set to 1. When the serial data is to be transmitted to the
DAC, PC0 is taken low, asserting the
CS
input of the DAC. When
the MC68HC11 is configured in this manner, serial data on
MOSI is valid on the rising edge of SCLK. The MC68HC11
transmits its serial data in 8-bit bytes (MSB first), with only
eight rising clock edges occurring in the transmit cycle. To load
data to the input serial register of the AD5626, PC0 is left low
after the first eight bits are transferred, and a second byte of
data is then transferred serially to the AD5626. During the
second byte load, the first 4 MSBs of the first byte are pushed
out of the input shift register of the DAC. At the end of the
second byte load, PC0 is taken high. To prevent accidental
advancing of the internal shift register, SCLK must already be
asserted before PC0 is taken high. To transfer the contents of
the input shift register to the DAC register, PD5 is taken low,
asserting the
LDAC
input. The
CLR
input of the DAC, controlled
by the MC68HC11 PC1 port, provides an asynchronous clear
function, setting the DAC output to zero.
06757-035
*
ADDITIONAL PINS OMITTED FOR CLARITY.
PC1
PC0
PD5
SCK
MOSI
MC68HC11*
AD5626
CLR
CS
LDAC
SCLK
SDIN
Figure 35. AD5626 to MC68HC11 Interface
AD5626
Rev. A | Page 17 of 20
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-187-AA
0.80
0.60
0.40
4
8
1
5
PIN 1
0.65 BSC
SEATING
PLANE
0.38
0.22
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.08
3.20
3.00
2.80
5.15
4.90
4.65
0.15
0.00
0.95
0.85
0.75
Figure 36. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
062507-A
TOP VIEW
8
1
5
4
0.30
0.23
0.18
EXPOSED
PAD
(BOTTOM VIEW)
PIN 1 INDEX
AREA
3.00
BSC SQ
SEATING
PLANE
0.80
0.75
0.70
0.20 REF
0.05 MAX
0.02 NOM
0.80 MAX
0.55 NOM
1.74
1.64
1.49
2.48
2.38
2.23
0.50
0.40
0.30
0.65 BSC
P
I
N
1
I
N
D
I
C
A
T
O
R
(
R
0
.
1
9
)
Figure 37. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD]
3 mm x 3 mm Body, Very Very Thin, Dual Lead
(CP-8-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model INL (LSB) Temperature Range Package Description Package Option Branding
AD5626BRMZ
1
±1 –40°C to +85°C 8-Lead MSOP RM-8 DAP
AD5626BRMZ-REEL7
1
±1 –40°C to +85°C 8-Lead MSOP RM-8 DAP
AD5626BCPZ-REEL7
1
±1 –40°C to +85°C 8-Lead LFCSP_WD CP-8-3 DAP
1
Z = RoHS Compliant Part.

AD5626BCPZ-REEL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC IC 5V 12-Bit SPI Interface
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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