TEA1751T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 10 January 2013 6 of 31
NXP Semiconductors
TEA1751T
HV start-up flyback controller with integrated PFC controller
7. Functional description
7.1 General control
The TEA1751T contains a controller for a power factor correction circuit as well as a
controller for a flyback circuit. The typical configuration is shown in Figure 3
.
7.1.1 Start-up and UnderVoltage LockOut (UVLO)
Initially, the capacitor on the V
CC
pin is charged from the high-voltage mains using the HV
pin.
When V
CC
is less than V
trip
, the charge current is low. This low current protects the IC if
the V
CC
pin is shorted to ground. To ensure a short start-up time, the charge current above
V
trip
is increased until V
CC
reaches V
th(UVLO)
. When V
CC
is between V
th(UVLO)
and V
startup
,
the charge current goes low again to ensure a low, safe restart duty cycle during fault
conditions.
The control logic activates the internal circuitry and switches off the HV charge current
when the voltage on pin V
CC
passes the V
startup
level. First, the LATCH pin current source
is activated and the soft-start capacitors on the PFCSENSE and FBSENSE pins are
charged.
When the LATCH pin voltage exceeds the V
en(LATCH)
voltage, and the soft start capacitor
on the PFCSENSE pin is charged, the PFC circuit is activated.
If the soft-start capacitor on the FBSENSE pin is charged, the flyback converter is also
activated. The flyback converter output voltage is then regulated to its nominal output
voltage. The auxiliary winding of the flyback converter takes over the IC supply. See
Figure 4
.
Fig 3. TEA1751T typical configuration
,&
