AD9432
Rev. F | Page 3 of 16
SPECIFICATIONS
V
DD
= 3.3 V, V
CC
= 5.0 V; external reference; differential encode input, unless otherwise noted.
Table 1.
Parameter Temp
Test 80 MSPS 105 MSPS
Level Min Typ Max Min Typ Max Unit
RESOLUTION 12 12 Bits
DC ACCURACY
Differential Nonlinearity (DNL) 25°C I −0.75 ±0.25 +0.75 −0.75 ±0.25 +0.75 LSB
Full VI −1.0 ±0.5 +1.0 −1.0 ±0.5 +1.0 LSB
Integral Nonlinearity (INL) 25°C I −1.0 ±0.5 +1.0 −1.0 ±0.5 +1.0 LSB
Full VI −1.5 ±1.0 +1.5 −1.5 ±1.0 +1.5 LSB
No Missing Codes Full VI Guaranteed Guaranteed
Gain Error
1
25°C I −5 +2 +7 −5 +2 +7 % FS
Gain Tempco
1
Full V 150 150 ppm/°C
ANALOG INPUTS (AIN, AIN)
Input Voltage Range Full V 2 2 V p-p
Common-Mode Voltage Full V 3.0 3.0 V
Input Offset Voltage Full VI −5 ±0 +5 −5 ±0 +5 mV
Input Resistance Full VI 2 3 4 2 3 4
Input Capacitance 25°C V 4 4 pF
Analog Bandwidth, Full Power 25°C V 500 500 MHz
ANALOG REFERENCE
Output Voltage Full VI 2.4 2.5 2.6 2.4 2.5 2.6 V
Tempco Full V 50 50 ppm/°C
Input Bias Current Full VI 15 50 15 50 μΑ
SWITCHING PERFORMANCE
Maximum Conversion Rate Full VI 80 105 MSPS
Minimum Conversion Rate Full IV 1 1 MSPS
Encode Pulse Width High (t
EH
) 25°C IV 4.0 6.2 4.0 4.8 ns
Encode Pulse Width Low (t
EL
) 25°C IV 4.0 6.2 4.0 4.8 ns
Aperture Delay (t
A
) 25°C V 2.0 2.0 ns
Aperture Uncertainty (Jitter) 25°C V 0.25 0.25 ps rms
Output Valid Time (t
V
)
2
Full VI 3.0 5.3 3.0 5.3 ns
Output Propagation Delay (t
PD
)
2
Full VI 5.5 8.0 5.5 8.0 ns
Output Rise Time (t
R
)
2
Full V 2.1 2.1 ns
Output Fall Time (t
F
)
2
Full V 1.9 1.9 ns
Out-of-Range Recovery Time 25°C V 2 2 ns
Transient Response Time 25°C V 2 2 ns
Latency Full IV 10 10 Cycles
DIGITAL INPUTS
Encode Input Common Mode Full V 1.6 1.6 V
Differential Input
(ENCODE, ENCODE
)
Full V 750 750 mV
Single-Ended Input
Logic 1 Voltage Full IV 2.0 2.0 V
Logic 0 Voltage Full IV 0.8 0.8 V
Input Resistance Full VI 3 5 8 3 5 8
Input Capacitance 25°C V 4.5 4.5 pF
DIGITAL OUTPUTS
Logic 1 Voltage (V
DD
= 3.3 V) Full VI V
DD
− 0.05 V
DD
− 0.05 V
Logic 0 Voltage (V
DD
= 3.3 V) Full VI 0.05 0.05 V
Output Coding Twos complement Twos complement
AD9432
Rev. F | Page 4 of 16
Parameter Temp
Test 80 MSPS 105 MSPS
Level Min Typ Max Min Typ Max Unit
POWER SUPPLY
Power Dissipation
3
Full VI 790 1000 850 1100 mW
I
VCC
Full VI 158 200 170 220 mA
I
VDD
Full VI 9.5 12.2 12.5 16 mA
Power Supply Rejection Ratio
(PSRR)
25°C I −5 +0.5 +5 −5 +0.5 +5 mV/V
DYNAMIC PERFORMANCE
4
Signal-to-Noise Ratio (SNR)
(Without Harmonics)
f
IN
= 10 MHz 25°C I 65.5 67.5 65.5 67.5 dB
f
IN
= 40 MHz 25°C I 65 67.2 67.2 dB
f
IN
= 49 MHz 25°C I 67.0 64 67.0 dB
f
IN
= 70 MHz 25°C V 66.1 66.1 dB
Signal-to-Noise and Distortion
(SINAD) Ratio (with Harmonics)
f
IN
= 10 MHz 25°C I 65 67.2 65 67.2 dB
f
IN
= 40 MHz 25°C I 64.5 66.9 66.9 dB
f
IN
= 49 MHz 25°C I 66.7 63 66.7 dB
f
IN
= 70 MHz 25°C V 65.8 65.8 dB
Effective Number of Bits (ENOB)
f
IN
= 10 MHz 25°C V 11.0 11.0 Bits
f
IN
= 40 MHz 25°C V 10.9 10.9 Bits
f
IN
= 49 MHz 25°C V 10.9 10.9 Bits
f
IN
= 70 MHz 25°C V 10.7 10.7 Bits
Second-Order and Third-Order
Harmonic Distortion
f
IN
= 10 MHz 25°C I −75 −85 −75 −85 dBc
f
IN
= 40 MHz 25°C I −73 −85 −83 dBc
f
IN
= 49 MHz 25°C I −83 −72 −80 dBc
f
IN
= 70 MHz 25°C V −80 −78 dBc
Worst Other Harmonic or Spur
(Excluding Second-Order and
Third-Order Harmonics)
f
IN
= 10 MHz 25°C I −80 −90 −80 −90 dBc
f
IN
= 40 MHz 25°C I −80 −90 −90 dBc
f
IN
= 49 MHz 25°C I −90 −80 −90 dBc
f
IN
= 70 MHz 25°C V −90 −90 dBc
Two-Tone Intermodulation
Distortion (IMD)
f
IN1
= 29.3 MHz; f
IN2
= 30.3 MHz 25°C V −75 −75 dBc
f
IN1
= 70.3 MHz; f
IN2
= 71.3 MHz 25°C V −66 −66 dBc
1
Gain error and gain temperature coefficients are based on the ADC only (with a fixed 2.5 V external reference and a 2 V p-p differential analog input).
2
t
V
and t
PD
are measured from the transition points of the ENCODE input to the 50%/50% levels of the digital output swing. The digital output load during testing is not
to exceed an ac load of 10 pF or a dc current of ±40 μA. Rise and fall times are measured from 10% to 90%.
3
Power dissipation measured with encode at rated speed and a dc analog input (outputs static, I
VDD
= 0).
4
SNR/harmonics based on an analog input voltage of –0.5 dBFS referenced to a 2 V full-scale input range.
AD9432
Rev. F | Page 5 of 16
TIMING DIAGRAM
t
V
t
PD
t
EL
t
EH
t
A
1/
f
S
SAMPLE N – 1
SAMPLE N + 1
DATA N – 11 DATA N – 10 DATA N – 1 DATA N DATA N + 1
DATA
N – 9
DATA
N – 2
SAMPLE N + 9
SAMPLE N + 10
SAMPLE N + 11
SAMPLE N
AIN
D11 TO D0
ENCODE
ENCODE
00587-003
Figure 2. Timing Diagram

AD9432BSTZ-80

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC IC 12-BIT 80 MSPS
Lifecycle:
New from this manufacturer.
Delivery:
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