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NCV7341D21R2G

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
NCV7341
http://onsemi.com
13
Table 8. DC CHARACTERISTICS
Symbol UnitMaxTypMinConditionsParameter
TRANSMITTER DATA INPUT (PIN TxD)
I
IL
Low−Level Input Current V
TxD
= 0.3 V
VIO
−70 −250 −500
mA
C
i
Input Capacitance Not Tested 1.0 5.0 10 pF
STANDBY AND ENABLE INPUTS (PINS STB AND EN)
V
IH
High−Level Input Voltage 0.7V
VIO
− V
IO
+
0.3
V
V
IL
Low−Level Input Voltage −0.3 − 0.3V
VIO
V
I
IH
High−Level Input Current V
STB
= V
EN
= 0.7V
VIO
1.0 5.0 10
mA
I
IL
Low−Level Input Current V
STB
= V
EN
= 0 V −0.5 0 5.0
mA
C
i
Input Capacitance 1.0 5.0 10 pF
RECEIVER DATA OUTPUT (PIN RxD)
I
OH
High−Level Output Current V
RxD
= V
VIO
− 0.4 V
V
VIO
= V
VCC
−1.0 −3.0 −6.0 mA
I
OL
Low−Level Output Current V
RxD
= 0.4 V
V
TxD
= 0 V Bus is Dominant
2.0 5.0 12 mA
FLAG INDICATION OUTPUT (PIN ERR)
I
OH
High−Level Output Current V
ERR
= V
VIO
− 0.4 V
V
VIO
= V
VCC
−4.0 −20 −50
mA
I
OL
Low−Level Output Current V
ERR
= 0.4 V 100 200 350
mA
LOCAL WAKE−UP INPUT (PIN WAKE)
I
IH
High−Level Input Current V
WAKE
= V
VBAT
− 1.9 V −1.0 −5.0 −10
mA
I
IL
Low−Level Input Current V
WAKE
= V
VBAT
− 3.1 V 1.0 5.0 10
mA
V
threshold
Threshold of the Local
Wake−up Comparator
Sleep or Standby Mode V
VBAT
−
3 V
V
VBAT
−
2.5 V
V
VBAT
−
2 V
V
INHIBIT OUTPUT (PIN INH)
VH
DROP
High Level Voltage Drop
I
INH
= −180 mA
50 200 800 mV
I
LEAK
Leakage Current in Sleep
Mode
0 − 5.0
mA
T
amb
< 100°C 0 − 1.0
mA
BUS LINES (PINS CANH AND CANL)
V
o(reces)
(norm)
Recessive Bus Voltage V
TxD
= V
VCC
; No Load, Normal
Mode
2.0 2.5 3.0 V
V
o(reces)
(stby)
Recessive Bus Voltage V
TxD
= V
VCC
; No Load, Standby
Mode
−100 0 100 mV
I
o(reces)
(CANH)
Recessive Output Current at
Pin CANH
−35 V < V
CANH
< +35 V;
0 V < V
CC
< 5.25 V
−2.5 − +2.5 mA
I
o(reces)
(CANL)
Recessive Output Current at
Pin CANL
−35 V < V
CANL
< +35 V;
0 V < V
VCC
< 5.25 V
−2.5 − +2.5 mA
V
o(dom)
(CANH)
Dominant output Voltage at
Pin CANH
V
TxD
= 0 V 3.0 3.6 4.25 V
V
o(dom)
(CANL)
Dominant Output Voltage at
Pin CANL
V
TxD
= 0 V 0. 5 1.4 1.75 V
V
o(dif)
(bus_dom)
Differential Bus Output
Voltage (V
CANH
− V
CANL
)
V
TxD
= 0 V; Dominant;
42.5 W < R
LT
< 60 W
1.5 2.25 3.0 V
V
o(dif)
(bus_rec)
Differential Bus Output
Voltage (V
CANH
− V
CANL
)
V
TxD
= V
CC
; Recessive; No
Load
−120 0 +50 mV
I
o(sc)
(CANH)
Short−Circuit Output Current
at Pin CANH
V
CANH
= 0 V; V
TxD
= 0 V −45 −70 −120 mA
NCV7341
http://onsemi.com
14
Table 8. DC CHARACTERISTICS
Symbol UnitMaxTypMinConditionsParameter
BUS LINES (PINS CANH AND CANL)
I
o(sc)
(CANL)
Short−Circuit Output Current
at Pin CANL
V
CANL
= 42 V; V
TxD
= 0 V 45 70 120 mA
V
i(dif)
(th)
Differential Receiver Threshold
Voltage (see Figure 7)
−12 V < V
CANL
< +12 V
−12 V < V
CANH
< +12 V
0.5 0.7 0.9 V
V
ihcm(dif)
(th)
Differential Receiver Threshold
Voltage for High
Common−Mode (see Figure 7)
−35 V < V
CANL
< +35 V
−35 V < V
CANH
< +35 V
0.35 0.7 1.00 V
V
i(dif)
(hys)
Differential Receiver Input
Voltage Hysteresis
(see Figure 7)
−35 V < V
CANL
< +35 V
−35V <V
CANH
< +35 V
50 70 100 mV
V
I(dif)_WAKE
Differential Receiver Input
Voltage for Bus Wake−up
Detection (in Sleep or
Standby Mode)
−12 V < V
CANH
< +12 V
−12 V < V
CANH
< +12 V
0.4 0.8 1.15 V
R
i(cm)
(CANH)
Common−Mode Input
Resistance at Pin CANH
15 26 39
kW
R
i(cm)
(CANL)
Common−Mode Input
Resistance at Pin CANL
15 26 39
kW
R
i(cm)(m)
Matching between Pin CANH
and Pin CANL Common
Mode Input Resistance
V
CANH
= V
CANL
−3.0 0 +3.0 %
R
i(dif)
Differential Input Resistance 25 50 75
kW
C
i(CANH)
Input Capacitance at Pin
CANH
V
TxD
= V
CC
7.5 20 pF
C
i(CANL)
Input Capacitance at Pin
CANL
V
TxD
= V
CC
7.5 20 pF
C
i(dif)
Differential Input Capacitance V
TxD
= V
CC
3.75 10 pF
COMMON−MODE STABILIZATION (PIN V
SPLIT
)
V
SPLIT
Reference Output Voltage at
Pin V
SPLIT
Normal mode;
−500 mA < I
SPLIT
< 500 mA
0.3 x
V
CC
0.5 x
V
CC
0.7 x
V
CC
I
SPLIT(i)
V
SPLIT
Leakage Current
Standby Mode
−27 V < V
SPLIT
< 40 V
−50 +50 mA
Standby Mode
−27 V < V
SPLIT
< 40 V
T
amb
< 100°C
−5.0 +5.0
I
SPLIT(lim)
V
SPLIT
Limitation Current
(Absolute Value)
Normal Mode 1.3 3.0 5.0 mA
THERMAL SHUTDOWN
T
J(SD)
Shutdown Junction
Temperature
150 160 180 °C
NCV7341
http://onsemi.com
15
Table 9. AC CHARACTERISTICS
Symbol Parameter Conditions Min Typ Max Unit
TIMING CHARACTERISTICS (Figure 6)
t
d(TxD−BUSon)
Delay TxD to Bus Active Setup According to Figure 8 40 85 105 ns
t
d(TxD−BUSoff)
Delay TxD to Bus Inactive Setup According to Figure 8 30 60 105 ns
t
d(BUSon−RxD)
Delay Bus Active to RxD Setup According to Figure 8 25 55 105 ns
t
d(BUSoff−RxD)
Delay Bus Inactive to RxD Setup According to Figure 8 40 65 105 ns
t
pd(rec−dom)
Propagation Delay TxD to
RxD from Recessive to
Dominant
Setup According to Figure 8 90 130 230 ns
t
d(dom−rec)
Propagation Delay TxD to
RxD from Dominant to
Recessive
Setup According to Figure 8 90 140 245 ns
t
UV(VCC)
Undervoltage Detection Time
on V
CC
5.0 10 12.5 ms
t
UV(VIO)
Undervoltage Detection Time
on V
IO
5.0 10 12.5 ms
t
dom(TxD)
TxD Dominant Timeout 300 600 1000
ms
t
h(min)
Minimum Hold−Time for the
Go−to−Sleep Mode
15 35 50
ms
t
dom
Dominant Time for Wake−up
via the Bus
Vdif(CAN) > 1.4 V 0.75 2.5 5.0
ms
Vdif(CAN) > 1.2 V 0.75 3.0 5.8
ms
t
rec
Recessive Time for Wake−up
via the Bus
V
BAT
= 12 V 0.75 2.5 5.0
ms
t
WAKE
Debounce Time for the
Wake−up via WAKE Pin
V
BAT
= 12 V 5.0 25 50
ms
t
errdet
Minimum dominant bit time for
bus error detection
NCV7341D20 version 1 2 4
ms
MEASUREMENT DEFINITIONS AND SETUPS
CANH
CANL
TxD
RxD
dominant
0.9V
0.5V
recessive
0.7 x V
CC
V
i(dif)
=
V
CANH
− V
CANL
t
d(BUSon−RxD)
PC20060915.2
0.3 X V
CC
t
pd(dom−rec)
50%
recessive
50%
t
d(BUSoff−RxD)
t
d(TxD−BUSoff)
t
d(TxD−BUSon)
t
pd(rec−dom)
Figure 6. Timing Diagram for AC Characteristics
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

NCV7341D21R2G

Mfr. #:
Buy NCV7341D21R2G
Manufacturer:
ON Semiconductor
Description:
CAN Interface IC HS LP CAN TRANSC.
Lifecycle:
New from this manufacturer.
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