Lattice Semiconductor LA-ispMACH 4000V/Z Automotive Family Data Sheet
27
Signal Descriptions
LA-ispMACH 4000V ORP Reference Table
LA-ispMACH 4000Z ORP Reference Table
Signal Names Description
TMS Input – This pin is the IEEE 1149.1 Test Mode Select input, which is used to control
the state machine
TCK Input – This pin is the IEEE 1149.1 Test Clock input pin, used to clock through the
state machine
TDI Input – This pin is the IEEE 1149.1 Test Data In pin, used to load data
TDO Output – This pin is the IEEE 1149.1 Test Data Out pin used to shift data out
GOE0/IO, GOE1/IO These pins are configured to be either Global Output Enable Input or as general I/O
pins
GND Ground
NC Not Connected
V
CC
The power supply pins for the logic core and JTAG port
CLK0/I, CLK1/I, CLK2/I, CLK3/I These pins are configured to be either CLK input or as an input
V
CCO0
, V
CCO1
The power supply pins for each I/O bank
yzz
Input/Output
1
– These are the general purpose I/O used by the logic array. y is GLB
reference (alpha) and z is macrocell reference (numeric). z: 0-15
LA-ispMACH 4032V/Z y: A-B
LA-ispMACH 4064V/Z y: A-D
LA-ispMACH 4128V/Z y: A-H
1. In some packages, certain I/Os are only available for use as inputs. See the signal connections table for details.
4032V 4064V 4128V
Number of I/Os 30
1
32 30
2
32 64 64 92
3
96
Number of GLBs 2244 4 888
Number of I/Os /GLB 16 16 8 8 16 8 12 12
Reference ORP Table 16 I/Os / GLB 8 I/Os / GLB 16 I/Os / GLB 8 I/Os /GLB 12 I/Os / GLB
1. 32-macrocell device, 44 TQFP: 2 GLBs have 15 out of 16 I/Os bonded out.
2. 64-macrocells device, 44 TQFP: 2 GLBs have 7 out of 8 I/Os bonded out.
3. 128-macrocell device, 128 TQFP: 4 GLBs have 11 out of 12 I/Os
4032Z 4064Z 4128Z
Number of I/Os 32 32 64 64
Number of GLBs 2448
Number of I/Os / GLB 16 8 16 8
Reference ORP Table
16 I/Os /
GLB
8 I/Os /
GLB
16 I/Os /
GLB
8 I/Os /
GLB
