IR2085STRPBF

4
IR2085S & (PbF)
www.irf.com
Lead Assignments
Functional Block Diagrams
Lead Definitions
Symbol Description
V
CC
Logic supply
GND Logic supply return
Vb High side floating supply
V
S
Floating supply return
HO High side output
LO Low side output
CS Current sense input
OSC Oscillator pin
Vb
HO
VS
LO
IR2085S
VCC
OSC
CS
GND
1
2
3
8
7
6
54
UVLO BIAS
OSC
BLOCK
PULSE
STEERING
+
OVC
-
UVLO
AND
RS
LATCH
SOFT
START
10PF
VCC
VREF
(250mV)
VCC
Vb
HO
VS
LO
CT
GND
IR2085S
BLOCK
DIAGRAM
CS
OSC
RT
Also available LEAD-FREE (PbF)
5
IR2085S & (PbF)
www.irf.com
Fig. 1 Typical Output Frequency (-25
o
C to 125
o
C)
Fig. 2 Typical Dead Time (@25
o
C)
Fig. 3 Typical Dead Time vs Temperature
0
50
100
150
200
250
300
350
400
450
500
10 20 30 40 50 60 70 80 90 100
RT
kohms
Frequency (kHz)
C
T
= 47pF
C
T
= 100pF
C
T
= 220pF
C
T
= 470pF
50
75
100
125
150
175
200
225
250
10 20 30 40 50 60 70 80 90 100
RT
(
kohms
)
Time (ns)
C
T
= 470pF
C
T
= 220pF
C
T
= 100pF
C
T
= 47pF
60
80
100
120
140
160
180
-40-20 0 20 406080100120
Temperature
Dead Time (ns)
DT(CT=100pF, RT=100k)
IR2085S& (PbF)
6 www.irf.com
Pin Descriptions
Cs: The input pin to the overcurrent comparator. Exceeding the overcurrent threshold value specified in
“Static Electrical Parameters” Section will terminate output pulses and start a new soft start cycle as soon
as the voltage on the pin reduce below the threshold value.
OSC: The oscillator-programming pin. Only two components are required to program the internal oscillator
frequency: a resistor connected between the V
CC
pin and the OSC pin, and a capacitor connected from
the OSC to COM. The approximate oscillator frequency is determined by the following simple formula:
f
OSC
= 1 / (2 · R
T
· C
T
)
Where frequency is in Hertz (Hz), RT resistance in Ohms () and CT capacitance in Farads (F). The
recommended range of timing resistors is between 10k and 100k and range of time capacitances is
between 47pF and 470pF. The timing resistors less than 10k should be avoided. The value of the timing
capacitor determines the amount of dead time between the two output drivers: lower the CT, shorter the
dead time and vice versa. It is not recommended to use a timing capacitor below 47pF, for best
performance keep the timing components physically as close as possible to the IR2085S. Separated
ground and V
CC
traces to the timing components are encouraged.
COM: Signal ground and power ground for all functions. Due to high current and high frequency operation,
a low impedance circuit board ground plane is highly recommended.
HO, LO: High side and low side gate drive pins. The high and low side drivers can directly drive the gate
of a power MOSFET. The drivers are capable of 1A peak source and sink currents. It is recommended
that the high and low drive pins be very close to the gates of the high side and low side MOSFETs to
prevent any delay and distortion of the drive signals.
V
B
: The high side power input connection. The high side supply is derived from a bootstrap circuit using a
low-leakage Schottky diode and a ceramic capacitor. To prevent noise, the Schottky diode and bypass
capacitor should be very close to the IR2085S.
V
S
: The high side power return connection. V
S
should be connected directly to the source terminal of high
side MOSFET with a trace as short as possible.
V
CC
: The IC bias input connection for the device. Although the quiescent V
CC
current is very low, total
supply current will be higher, depending on the gate charge of the MOSFETs connected to the HO and LO
pins, and the programmed oscillator frequency, total V
CC
current is the sum of quiescent V
CC
current and
the average current at HO and LO. Knowing the operating frequency and the MOSFET gate charge (Qg)
at selected V
CC
voltage, the average current can be calculated from:
Iave = 2 x Qg X f
OSC
To prevent noise problem, a bypass ceramic capacitor connected to V
CC
and COM should be placed as
close as possible to the IR2085S.
IR2085S has an under voltage lookout feature for the IC bias supply, V
CC
. The minimum voltage required
on V
CC
to make sure that IC will work within specifications must be higher than 8.5V (9.5V minimum V
CC
is
recommended to prevent asymmetrical gates signal on HO and LO pins that are expected when V
CC
is
between 7.5V and 8.5V).

IR2085STRPBF

Mfr. #:
Manufacturer:
Infineon / IR
Description:
Gate Drivers Hi Spd 100V 50% Duty Cycle Hlf Brdg Drvr
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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