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ddf9c32_64x72.fm - Rev. C 10/08 EN
11 ©2002 Micron Technology, Inc. All rights reserved.
256MB, 512MB (x72, ECC, SR) 184-Pin DDR SDRAM RDIMM
Electrical Specifications
Table 10: IDD Specifications and Conditions – 256MB (All Other Die Revisions)
Values are for MT46V32M8 DDR SDRAM only and are computed from values specified in the
256Mb (32 Meg x 8) component data sheet
Parameter/Condition Symbol -40B -335 -262
-26A/
-265
Units
Operating one device bank active-precharge current:
t
RC =
t
RC (MIN);
t
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing once per clock cycle;
Address and control inputs changing once every two clock cycles
IDD0 1,215 1,125 1,125 1,080 mA
Operating one device bank active-read-precharge current: Burst = 4;
t
RC =
t
RC (MIN);
t
CK =
t
CK (MIN); IOUT = 0mA; Address and control inputs
changing once per clock cycle
IDD1 1,530 1,530 1,440 1,305 mA
Precharge power-down standby current: All device banks idle; Power-
down mode;
t
CK =
t
CK (MIN); CKE = (LOW)
IDD2P 36 36 36 36 mA
Idle standby current:
CS# = HIGH; All device banks idle;
t
CK =
t
CK (MIN); CKE
= HIGH; Address and other control inputs changing once per clock cycle. VIN =
VREF for DQ, DQS, and DM
IDD2F 540 450 405 405 mA
Active power-down standby current: One device bank active; Power-
down mode;
t
CK =
t
CK (MIN); CKE = LOW
IDD3P 360 270 225 225/
270
mA
Active standby current: CS# = HIGH; CKE = HIGH; One device bank; Active
precharge;
t
RC =
t
RAS (MAX);
t
CK =
t
CK (MIN); DQ, DM, and DQS inputs
changing twice per clock cycle; Address and other control inputs changing
once per clock cycle
IDD3N 630 540 450 450 mA
Operating burst read current: Burst = 2; Continuous burst reads; One
device bank active; Address and control inputs changing once per clock cycle;
t
CK =
t
CK (MIN); IOUT = 0mA
IDD4R 1,800 1,575 1,350 1,350 mA
Operating burst write current: Burst = 2; Continuous burst writes; One
device bank active; Address and control inputs changing once per clock cycle;
t
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle
IDD4W 1,755 1,575 1,350 1,350 mA
Auto refresh burst current
t
RFC =
t
RFC (MIN)
IDD5 2,340 2,295 2,115 2,115/
2,205
mA
t
RFC = 7.8125µs
IDD5A 54 54 54 54 mA
Self refresh current: CKE ≤ 0.2V
IDD636363636mA
Operating bank interleave read current: Four device bank interleaving
READs; (burst = 4) with auto precharge,
t
RC =
t
RC (MIN);
t
CK =
t
CK (MIN);
Address and control inputs change only during active READ or WRITE
commands
IDD7 4,230 3,690 3,150 3,150/
3,285
mA
