BTS 7810 K
Data Sheet 5 2003-03-11
1.6 Circuit Description
Input Circuit
The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with
hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into
the necessary form for driving the power output stages. The inputs are protected by ESD
clamp-diodes.
The inputs IL1 and IL2 are connected to the gates of the standard N-channel vertical
power-MOS-FETs.
Output Stages
The output stages consist of a low
R
DS ON
Power-MOS H-bridge. In H-bridge
configuration, the D-MOS body diodes can be used for freewheeling when commutating
inductive loads. If the high-side switches are used as single switches, positive and
negative voltage spikes which occur when driving inductive loads are limited by
integrated power clamp diodes.
Short Circuit Protection
The outputs are protected against
– output short circuit to ground
– overload (load short circuit).
An internal OP-amp controls the Drain-Source-voltage by comparing the DS-voltage-
drop with an internal reference voltage. Above this trippoint the OP-Amp reduces the
output current depending on the junction temperature and the drop voltage.
In the case of overloaded high-side switches the status output is set to low.
Overtemperature Protection
The high-side switches incorporate an overtemperature protection circuit with hysteresis
which switches off the output transistors and sets the status output to low.
Undervoltage-Lockout (UVLO)
When V
S
reaches the switch-on voltage V
UVON
the IC becomes active with a hysteresis.
The high-side output transistors are switched off if the supply voltage
V
S
drops below the
switch off value
V
UVOFF.
Open Load Detection
Open load is detected by voltage measurement in off state. If the output voltage exceeds
a specified level the error flag is set with a delay.
