NCP370MUAITXG

© Semiconductor Components Industries, LLC, 2011
July, 2011 Rev. 6
1 Publication Order Number:
NCP370/D
NCP370
Positive and Negative
Overvoltage Protection
with Internal Low R
ON
N-MOSFETs and Reverse
Charge Control Pin
The NCP370 is an overvoltage, overcurrent and reverse control
device. Two main modes are available by setting logic pins. First mode
is Direct Mode from WallAdapter to the system. In this mode the
system is both positive and negative overvoltage protected up to
+28 V and down to 28 V. The wall adapter (or AC/DC charger) is
disconnected from the system if the input voltage exceeds the
overvoltage (OVLO) or undervoltage (UVLO) thresholds. At power
up, the V
out
turns on 30 ms after the V
in
exceeds the undervoltage
threshold.
The second mode (see Tables 1 & 2), called the Reverse Mode,
allows an external accessory to be powered by the system battery or
boost converter. Here the external accessory would be connected to
the device input (bottom connector of system) and the device battery
would be at the device output. In this case overcurrent protection is
activated to prevent accessory faults and battery discharge. Thanks to
the NCP370 using an internal NMOS, the system cost and the PCB
area of the application board are minimized.
The NCP370 provides a negative going flag (FLAG) output which
alerts the system that a fault has occurred.
In addition, the device has ESDprotected input (15 kV Air) when
bypassed with a 1 mF or larger capacitor.
Features
Overvoltage Protection Up to 28 V
Negative Voltage Protection Down to 28 V
Reverse Charge Control: REV
Direct Charge Control: DIR
Overcurrent Protection
Thermal Shutdown
Onchip Low R
DS(on)
NMOS Transistors: Typical 130 mW
Overvoltage Lockout (OVLO)
Undervoltage Lockout (UVLO)
SoftStart
Alert FLAG Output
Compliance to IEC6100042 (Level 4)
8 kV (Contact)
15 kV (Air)
ESD Ratings: Machine Model = B
Human Body Model = 2
12 Lead TLLGA 3x3 mm Package
This is a PbFree Device
Typical Applications
Cell Phones
Camera Phones
Digital Still Cameras
Personal Digital Applications
MP3 Players
MARKING
DIAGRAM
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = PbFree Package
http://onsemi.com
12 PIN LLGA
MU SUFFIX
CASE 513AK
NC
OUT
FLAG
DIR
REV
Ilim
IN
IN
GND
RES
RES
RES
NCP370
(Top View)
12
11
10
9
8
7
1
2
3
4
5
6
NCAI
370
ALYWG
G
(Note: Microdot may be in either location)
1
Device Package Shipping
ORDERING INFORMATION
NCP370MUAITXG LLGA12
(PbFree)
2500 / Tape &
Reel
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
NCP370
http://onsemi.com
2
10k
1mF
4.7mF
LI+BATTERY
GND
Wall Adapter
NCP370
1
2
3
8
9
10
7
11
12
Figure 1. Typical Application Circuit
IN
IN
GND
Ilim
OUT
NC
R
limit
FLAG
REV
Charger
System
REV
DIR
DIR
FLAG
REV
DIR
FLAG
RES
RES
RES
4
5
6
FUNCTIONAL BLOCK DIAGRAM
Figure 2. Functional Block Diagram
Gate Driver and Reverse OCP
Logic
Charge
Pump
Control
Logic
and
Timer
UVLO
OVLO
Thermal
Shutdown
EN
Block
VREF
INPUT
DIR
GND
FLAG
REV
I
lim
OUTPUT
NCP370
http://onsemi.com
3
PIN FUNCTION DESCRIPTION
Pin Name Type Description
1, 2 IN POWER
Input voltage pins. These pins are connected to the power supply. A 1 mF low ESR ceramic capacitor, or
larger, must be connected between these pins and GND. The two IN pins must be hardwired to common
supply.
3 GND POWER Main Ground
4 RES INPUT Reserved pin. This pin must be connected to GND.
5 RES INPUT Reserved pin. This pin must be connected to GND.
6 RES INPUT Reserved pin. This pin must be connected to GND.
7 Ilim OUTPUT Current Limit Pin. This pin provides the reference, based on the internal bandgap voltage reference, to
limit the over current, across internal NMOSFETs, from battery to external accessory. A 1% tolerance,
or better, resistor shall be used to get the highest accuracy of the overcurrent limit.
8 REV INPUT Reverse Charge Control Pin. In combination with DIR, the internal NMOSFETs are turned on if Battery
is applied on the OUT pin (See Tables 1 & 2). In reverse mode, the internal overcurrent protection is
activated. When reverse mode is disabled, the NCP370 current consumption, into OUT pin, is drastically
decreased to limit battery discharge.
9 DIR INPUT Direct Mode Pin. In combination with REV, the internal NMOSFETs are turned on if a wall adapter
ACDC is applied on the IN pins (See Tables 1 & 2). The device enters in shutdown mode when this pin
is tied to a high level and the REV pin is tied to high. In this case the output is disconnected from input.
The state of this pin does not have an impact on the fault detect of the FLAG pin.
10 FLAG OUTPUT Fault Indication Pin. This pin allows an external system to detect fault condition. The pin goes low when
input voltage exceeds OVLO threshold or drops below UVLO threshold, charge current from battery to
accessory exceeds current limit or internal temperature exceeds thermal shutdown limit. Since the pin is
open drain functionality, an external pull up resistor to VBat must be added (10 kW minimum value).
11 OUT OUTPUT Output Voltage Pin. This pin follows IN pins when “no input fault” is detected. The output is disconnected
from the V
IN
power supply when the input voltage is under the UVLO threshold or above OVLO threshold
or thermal shutdown limit is exceeded.In Reverse Mode, the device is supplied across OUT pin.
12 NC NC Not Connected
13 PAD1 POWER The PAD1 is used to dissipate the internal MOSFET thermal energy and must be soldered to an isolated
PCB area. The area mustn’t be connected to any other potential than complete isolated one. See PCB
recommendations on page 9.
MAXIMUM RATINGS
Rating Symbol Value Unit
Minimum Voltage (IN to GND) Vmin
in
30 V
Minimum Voltage (All others to GND) Vmin 0.3 V
Maximum Voltage (IN to GND) Vmax
in
30 V
Maximum Voltage (OUT to GND) Vmax
out
10 V
Maximum Voltage (All others to GND) Vmax 7 V
Thermal Resistance, JunctiontoAir, (Note 1)
R
q
JA
200 °C/W
Operating Ambient Temperature Range T
A
40 to +85 °C
Storage Temperature Range T
STG
65 to +150 °C
Junction Operating Temperature T
J
150 °C
ESD Withstand Voltage (IEC 6100042)
Human Body Model (HBM), Model = 2, (Note 2)
Machine Model (MM) Model = B, (Note 3)
Vesd 15kV air, 8kV contact
2000V
200V
kV
V
V
Moisture Sensitivity MSL Level 1
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The R
q
JA
is highly dependent on the PCB heat sink area (connected to PAD1). See PCB recommendation paragraph.
2. Human Body Model, 100 pF discharged through a 1.5 kW resistor following specification JESD22/A114.
3. Machine Model, 200 pF discharged through all pins following specification JESD22/A115.

NCP370MUAITXG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Controllers POS-NEG OVP W/OCP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet