DG534A/538A
Vishay Siliconix
www.vishay.com
4
Document Number: 70069
S-05734—Rev. G, 29-Jan-02
ABSOLUTE MAXIMUM RATINGS
V+ to GND –0.3 V to +21 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V+ to V––0.3 V to +21 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V– to GND –10 V to +0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
L
0 V to (V+) + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Inputs (V–) –0.3 V to (V
L
) + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
or 20 mA, whichever occurs first
V
S
, V
D
(V–) –0.3 V to (V–) + 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
or 20 mA, whichever occurs first
Current (any terminal) Continuous 20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current(S or D) Pulsed l ms 10% Duty 40 mA. . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature (A Suffix) –65 to 150_C. . . . . . . . . . . . . . . . . . .
(D Suffix) –65 to 125_C. . . . . . . . . . . . . . . . . . .
Power Dissipation (Package)
a
Plastic DIP
b
625 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PLCC
c
450 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sidebraze
d
1200 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes:
a. All leads soldered or welded to PC board.
b. Derate 8.3 mW/_C above 75_C.
c. Derate 6 mW/_C above 75_C.
d. Derate 16 mW/_C above 75_C.
SPECIFICATIONS
a
Test Conditions
Unless Otherwise Specified
A Suffix
–55 to 125_C
D Suffix
–40 to 85_C
Parameter Symbol
V+ = 15 V, V– = –3 V, V
L
= 5 V
WR
= 0.8 V, RS, EN= 2 V
Temp
b
Typ
c
Min
d
Max
d
Min
d
Max
d
Unit
Analog Switch
Analog Signal Range
g
V
ANALOG
V– = –5 V Full –5 8 –5 8 V
Drain-Source
On-Resistance
r
DS(on)
I
S
= –10 mA, V
S
= 0 V
Room
Full
45 90
120
90
120
Resistance Match
Between Channels
r
DS(on)
V
AIL
= 0.8 V, V
AIH
= 2 V
Sequence Each Switch On
Room 9 9
Source Off
Leakage Current
I
S(off)
V
S
= 8 V, V
D
= 0 V, EN = 0.8 V
Room
Full
0.05 –5
–50
5
50
–5
–50
5
50
Drain Off
Leakage Current
I
D(off)
V
S
= 0 V, V
D
= 8 V, EN = 0.8 V
Room
Full
0.1 –20
–500
20
500
–20
–100
20
100
nA
Drain On
Leakage Current
I
D(on)
V
S
= V
D
= 8 V
Room
Full
0.1 –20
–1000
20
1000
–20
–200
20
200
Digital Control
Input Voltage High V
AIH
Full 2 2
Input Voltage Low V
AIL
Full 0.8 0.8
V
Address Input Current I
AI
V
AI
= 0 V, or 2 V or 5 V
Room
Full
–0.1 –1
–10
1
10
–1
–10
1
10
A
V
AO
= 2.7 V Room –21 –2.5 –2.5
Address Output Current I
AO
V
AO
= 0.4 V Room 3.5 2.5 2.5
mA
Dynamic Characteristics
On State Input
PLCC Room 28 40 40
On State Input
Capacitance
g
C
S(on)
See Figure 11
DIP Room 31 45 45
Off State Input
PLCC Room 3 5 4
Off State Input
Capacitance
g
C
S(off)
DIP Room 4 5
pF
Off State Output
See Figure 12
PLCC Room 6 10 8
Off State Output
Capacitance
g
C
D(off)
DIP Room 8 10
Transition Time t
TRANS
Room
Full
160 300
500
300
500
Break-Before-Make
Interval
t
OPEN
See Figure 4
Room
Full
80 50
25
50
25
EN, WR Turn On Time t
ON
See Figure 2 and 3
Room
Full
150 300
500
300
500
ns
EN, Turn Off Time t
OFF
See Figure 2
Room
Full
105 175
300
175
300
Charge Injection Qi See Figure 5 Room –70 pC
