LTC3538
7
3538fb
BLOCK DIAGRAM
GATE DRIVERS
AND
ANTICROSS
CONDUCTION
0.5A
C
1V
B
SW2SW1
D
L1
ANTI-RING
A
PWM LOGIC
AND
OUTPUT PHASING
INTERNAL
SOFT-START
THERMAL
SHUTDOWN
OSC
1MHz
5μs
DELAY
BURST
MODE
CONTROL
TSD
UVLO
REVERSE
CURRENT
LIMIT
AVERAGE
CURRENT LIMIT
PEAK
CURRENT LIMIT
PWM
COMPARATORS
UVLO
2A
C
IN
V
IN
2.4V TO 5.5V
3.5A
2.3V
C
P1
SOFT-START
C
Z1
R
Z
R2
R1
C
P2
C
OUT
V
OUT
V
OUT
V
IN
3538 BD
+
+
+
SLEEP
SS DONE
FB
+
+
+
+
7
8
6
5
FB
1
V
C
2
BURST
GND
1 = BurstMode OPERATION
0 = FIXED FREQUENCY
BURST
4
3
+
OFF ON
LTC3538
8
3538fb
OPERATION
The LTC3538 provides high effi ciency, low noise power
for a wide variety of handheld electronic devices. The LTC
proprietary topology allows input voltages above, below
and equal to the output voltage through proper phasing
of the four on-chip MOSFET switches. The error amplifi er
output voltage on V
C
determines the output duty cycle of the
switches. Since V
C
is a fi ltered signal, it provides rejection
of frequencies from well below the switching frequency.
The low R
DS(ON)
, low gate charge synchronous switches
provide high frequency pulse width modulation control at
high effi ciency. High effi ciency is achieved at light loads
when Burst Mode operation is selected.
LOW NOISE FIXED FREQUENCY OPERATION
Operating Frequency
The operating frequency is internally fi xed to 1MHz to
maximize overall converter effi ciency while minimizing
external component size.
Error Amplifi er
The error amplifi er controls the duty cycle of the internal
switches. The loop compensation components are con-
gured around the amplifi er to provide converter loop
stability. Pulling down the output of the error amplifi er
(V
C
) below 0.25V will disable the LTC3538. In shutdown
the LTC3538 will draw only 1.5μA typical from the input
supply. During normal operation the V
C
pin should be
allowed to fl oat.
Soft-Start
The converter has an internal voltage mode soft-start
circuit with a nominal duration of 1.5ms. The converter
remains in regulation during soft-start and will therefore
respond to output load transients that occur during this
time. In addition, the output voltage risetime has minimal
dependency on the size of the output capacitor or load.
During soft-start, the converter is forced into PWM
operation regardless of the state of the BURST pin.
Internal Current Limit
There are two current limit circuits in the LTC3538. The fi rst
is a high speed peak current limit amplifi er that will shut
off switch A once the input current exceeds ~
3.5
A typical.
The delay to output of this amplifi er is typically 50ns.
The second current limit sources current out of the FB pin
to drop the output voltage once the input average current
exceeds 2A typical. This method provides a closed loop
means of clamping the input current. During conditions
when V
OUT
is near ground, such as during a short circuit
or during start-up, this threshold is cut to 1A typical,
providing a foldback feature to limit power dissipation. For
this current limit feature to be most effective, the Thevenin
resistance (typically the parallel combination of R1 and
R2) from FB to ground should be greater than 100k.
Reverse Current Limit
During fi xed frequency operation, the LTC3538 operates in
forced continuous conduction mode. The reverse current
limit comparator monitors the inductor current from the
output through switch D. Should this negative inductor
current exceed 500mA typical, the LTC3538 shuts off
switch D.
Four-Switch Control
SW1 SW2
V
IN
V
OUT
NMOS B NMOS C
PMOS A
L1
PMOS D
3538 FO1
8 5
67
Figure 1. Simplifi ed Diagram of Output Switches
Figure 1 shows a simplifi ed diagram of how the four internal
switches are connected to the inductor, V
IN
, V
OUT
and GND.
Figure 2 shows the regions of operation for the LTC3538
as a function of the internal control voltage.
LTC3538
9
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OPERATION
Depending on the V
C
voltage, the LTC3538 will operate in
either buck, buck-boost or boost mode. The four power
switches are properly phased so the transfer between
operating modes is continuous, smooth and transparent to
the user. When V
IN
approaches V
OUT
the buck-boost region
is entered, where the conduction time of the four-switch
region is typically 150ns. Referring to Figures 1 and 2, the
various regions of operation will now be described.
Buck-Boost or Four Switch (V
IN
~ V
OUT
)
When the control voltage, V
C
, is above voltage V2, switch
pair AD remains on for duty cycle D
MAX_BUCK
, and the switch
pair AC begins to phase in. As switch pair AC phases in,
switch pair BD phases out accordingly. When V
C
reaches
the edge of the buck-boost range, at voltage V3, the AC
switch pair completely phase out the BD pair, and the boost
phase begins at duty cycle D4
SW
. The input voltage, V
IN
,
where the four switch region begins is given by:
V
IN
= V
OUT
(1 – D4
SW
) ≈ 0.85 • V
OUT
The point at which the four-switch region ends is given
by:
V
IN
=
V
OUT
1 D4
SW
V 1.18 V
OUT
Boost Region (V
IN
< V
OUT
)
Switch A is always on and switch B is always off during
this mode. When the control voltage, V
C
, is above volt-
age V3, switch pair CD will alternately switch to provide
a boosted output voltage. This operation is typical to a
synchronous boost regulator. The maximum duty cycle
of the converter is limited to 88% typical and is reached
when V
C
is above V4.
Burst Mode OPERATION
Burst Mode operation reduces quiescent current consump-
tion of the LTC3538 at light loads and improves overall
conversion effi ciency, increasing battery life. During Burst
Mode operation the LTC3538 delivers energy to the out-
put until it is regulated and then goes into a sleep mode
where the outputs are off and the quiescent current drops
to 35μA. In this mode the output ripple has a variable
frequency component that depends upon load current,
and will typically be about 2% peak-to-peak. Burst Mode
operation ripple can be reduced slightly by using more
output capacitance. Another method of reducing Burst
Mode operation ripple is to place a small feed-forward
capacitor across the upper resistor in the V
OUT
feedback
divider network (as in Type III compensation).
3538 F02
A ON, B OFF
PWM C, D SWITCHES
BOOST REGION
FOUR-SWITCH PWM
BUCK-BOOST
REGION
D ON, C OFF
PWM A, B SWITCHES
D
MIN
BOOST
D
MAX
BUCK
D
MAX
BOOST
0%
88%
DUTY
CYCLE
V3 (~1.8V)
V2 (~1.7V)
V4 (~2.2V)
V1 (~1.2V)
CONTROL
VOLTAGE, V
C
BUCK REGION
Figure 2. Switch Control vs Control Voltage, V
C
Buck Region (V
IN
> V
OUT
)
Switch D is always on and switch C is always off during
this mode. When the control voltage, V
C
, is above volt-
age V1, output A begins to switch. During the off time of
switch A, synchronous switch B turns on for the remainder
of the period. Switches A and B will alternate similar to a
typical synchronous buck regulator. As the control volt-
age increases, the duty cycle of switch A increases until
the maximum duty cycle of the converter in buck mode
reaches D
MAX_BUCK
, given by:
D
MAX_BUCK
= 100 – D4
SW
%
where D4
SW
= duty cycle % of the four switch range.
D4
SW
= (150ns • f) • 100 %
where f = operating frequency, Hz.
Beyond this point the four switch, or buck-boost region
is reached.

LTC3538EDCB#TRMPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 800mA, 1MHz Wide Input Voltage Synch Buck-Boost DC/DC Converter in DFN-8
Lifecycle:
New from this manufacturer.
Delivery:
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