TJA1086G All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet Rev. 1 — 13 July 2017 43 of 64
NXP Semiconductors
TJA1086G
FlexRay active star coupler)
11. Dynamic characteristics
Table 16. Dynamic characteristics
All parameters are guaranteed for V
BAT
= 4.45 V to 60 V; V
CC
= 4.45 V to 5.25 V; V
BUF
= 4.45 V to 5.25 V; V
IO
= 2.55 V to
5.25 V; T
vj
=
40
C to + 150
C; R
bus
= 40
, C
bus
= 100 pF; C
RXD
= 15 pF; C
TRXD0
= C
TRXD1
= 50 pF and C
SDO
= 50 pF
unless otherwise specified. All voltages are defined with respect to ground; positive currents flow into the IC.
Symbol Parameter Conditions Min Typ Max Unit
Undervoltage detection
t
det(uv)(VBAT)
undervoltage detection time on
pin V
BAT
V
BAT
=4.35V 5 - 150 s
t
rec(uv)(VBAT)
undervoltage recovery time on
pin V
BAT
V
BAT
=4.85V 5 - 150 s
t
det(uv)(VCC)
undervoltage detection time on
pin V
CC
V
CC
= 4.35 V 5 - 100 s
t
rec(uv)(VCC)
undervoltage recovery time on
pin V
CC
V
CC
=4.85V 5 - 100 s
t
det(uv)(VBUF)
undervoltage detection time on
pin V
BUF
V
BUF
=4.10V 5 - 100 s
t
rec(uv)(VBUF)
undervoltage recovery time on
pin V
BUF
V
BUF
=4.6V 5 - 100 s
t
det(uv)(VIO)
undervoltage detection time on
pin V
IO
V
IO
=2.45V 5 - 100 s
t
rec(uv)(VIO)
undervoltage recovery time on
pin V
IO
V
IO
=2.9V 5 - 100 s
t
to(uvd)(VCC)
undervoltage detection time-out
time on pin V
CC
100 - 670 ms
t
to(uvd)(VIO)
undervoltage detection time-out
time on pin V
IO
100 - 670 ms
t
to(uvr)(VCC)
undervoltage recovery time-out
time on pin V
CC
1-5ms
t
to(uvr)(VIO)
undervoltage recovery time-out
time on pin V
IO
1-5ms
SPI
t
cy(clk)
clock cycle time 0.5 - 100 s
t
SPILEAD
SPI enable lead time 250 - - ns
t
SPILAG
SPI enable lag time 250 - - ns
t
su(D)
data input set-up time 150 - - ns
t
h(D)
data input hold time 100 - - ns
t
d(SCLK-SDO)
delay time from SCLK to SDO - - 200 ns
t
WH(S)
chip select pulse width HIGH 10 - - s
t
d(SCSNHL-SDOL)
SCSN falling edge to SDO
LOW-level delay time
--250ns
t
d(SCSNLH-SDOZ)
SCSN rising edge to SDO
three-state delay time
--500ns
TJA1086G All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet Rev. 1 — 13 July 2017 44 of 64
NXP Semiconductors
TJA1086G
FlexRay active star coupler)
Transmit path
t
d(TXD-bus)
delay time from TXD to bus AS_Normal; see Figure 10
[1]
DATA_0 - - 75 ns
DATA_1 - - 75 ns
t
d(TXD-bus)
delay time difference from TXD to
bus
between DATA_0 and DATA_1;
AS_Normal
[1]
[2]
5- +5ns
t
d(TXD-TRXD)
delay time from TXD to TRXD AS_Normal; see Figure 10
[1]
DATA_0 - - 60 ns
DATA_1 - - 60 ns
t
d(TXD-TRXD)
delay time difference from TXD to
TRXD
between DATA_0 and DATA_1;
AS_Normal
[1]
5- +5ns
t
d(TRXD-bus)
delay time from TRXD to bus AS_Normal; see Figure 12
DATA_0 - - 75 ns
DATA_1 - - 75 ns
t
d(TRXD-bus)
delay time difference from TRXD
to bus
between DATA_0 and DATA_1;
AS_Normal
[2]
5- +5ns
t
d(TXEN-busact)
delay time from TXEN to bus
active
AS_Normal; from idle to active - - 175 ns
t
d(TXEN-busidle)
delay time from TXEN to bus idle AS_Normal; from active to idle - - 150 ns
t
d(TXEN-RXD)
delay time from TXEN to RXD - - 150 ns
t
d(TRXD-busact)
delay time from TRXD to bus
active
t
det(act)(TRXD)
+ t
d(TRXD-bus)
--275ns
t
d(TRXD-busidle)
delay time from TRXD to bus idle t
det(idle)(TRXD)
+ t
d(TRXD-bus)
--275ns
t
d(busact-TRXD)
delay time from bus active to
TRXD
t
det(act)(bus)
+ t
d(bus-TRXD)
--285ns
t
d(busidle-TRXD)
delay time from bus idle to TRXD t
det(idle)(bus)
+ t
d(bus-TRXD)
--275ns
t
d(TRXDact-RXD)
delay time from TRXD activity
detection to RXD
t
det(act)(TRXD)
+ t
d(TRXD-RXD)
--260ns
t
d(busact-bus)
delay time from bus active to bus from one branch to another,
including activity detection time;
t
det(act)(bus)
+ t
d(bus-bus)
--330ns
t
d(busidle-bus)
delay time from bus idle to bus from one branch to another,
including idle detection time;
t
det(idle)(bus)
+ t
d(bus-bus)
--320ns
Receive path
t
d(bus-TRXD)
delay time from bus to TRXD AS_Normal; see Figure 11
DATA_0 - - 75 ns
DATA_1 - - 75 ns
t
d(bus-TRXD)
delay time difference from bus to
TRXD
between DATA_0 and DATA_1 AS_
Normal; V
cm
=2.5V
R
pu
=200
[2]
[3]
5- +5ns
Table 16. Dynamic characteristics
…continued
All parameters are guaranteed for V
BAT
= 4.45 V to 60 V; V
CC
= 4.45 V to 5.25 V; V
BUF
= 4.45 V to 5.25 V; V
IO
= 2.55 V to
5.25 V; T
vj
=
40
C to + 150
C; R
bus
= 40
, C
bus
= 100 pF; C
RXD
= 15 pF; C
TRXD0
= C
TRXD1
= 50 pF and C
SDO
= 50 pF
unless otherwise specified. All voltages are defined with respect to ground; positive currents flow into the IC.
Symbol Parameter Conditions Min Typ Max Unit
TJA1086G All information provided in this document is subject to legal disclaimers. © NXP B.V. 2017. All rights reserved.
Product data sheet Rev. 1 — 13 July 2017 45 of 64
NXP Semiconductors
TJA1086G
FlexRay active star coupler)
t
d(bus-RXD)
delay time from bus to RXD AS_Normal; see Figure 11
DATA_0 - - 75 ns
DATA_1 - - 75 ns
t
d(bus-RXD)
delay time difference from bus to
RXD
between DATA_0 and DATA_1 AS_
Normal; V
cm
= 2.5 V
[2]
[3]
5- +5ns
t
d(TRXD-RXD)
delay time from TRXD to RXD AS_Normal; see Figure 12
DATA_0 - - 60 ns
DATA_1 - - 60 ns
t
d(TRXD-RXD)
delay time difference from TRXD
to RXD
between DATA_0 and DATA_1 AS_
Normal
5- +5ns
t
d(TXD-RXD)
delay time from TXD to RXD AS_Normal; see Figure 10
[1]
DATA_0 - 3060ns
DATA_1 - 3060ns
t
d(bus-bus)
delay time from bus to bus from one branch to another
AS_Normal; see Figure 11
DATA_0 - - 120 ns
DATA_1 - - 120 ns
t
d(bus-bus)
delay time difference from bus to
bus
between DATA_0 and DATA_1 AS_
Normal
8- +8ns
Bus slope
t
r(dif)(bus)
bus differential rise time DATA_0 to DATA_1; 20 % to 80 % 6 - 18.75 ns
DATA_0 to idle; 300 mV to
30 mV
- - 30 ns
t
f(dif)(bus)
bus differential fall time DATA_1 to DATA_0; 20 % to 80 % 6 - 18.75 ns
DATA_1 to idle; 300 mV to 30 mV - - 30 ns
idle to DATA_0; 30 mV to
300 mV
- - 30 ns
t
(r-f)(dif)
difference between differential
rise and fall time
between DATA_0 and DATA_1 3- +3ns
Pin RXD
t
r
rise time 20 % to 80 % - - 9 ns
t
f
fall time 80 % to 20 % - - 9 ns
t
(r+f)
sum of rise and fall time 20 % to 80 % and 80 % to 20 % - - 13 ns
t
(r-f)
difference between rise and fall
time
20 % to 80 % 5- +5ns
Pin RSTN
t
det(rst)
reset detection time 5 - 20 s
Pin BGE
t
d(BGE-busact)
delay time from BGE to bus
active
activity detected on TXEN - - 100 ns
t
d(BGE-busidle)
delay time from BGE to bus idle activity detected on TXEN - - 100 ns
Table 16. Dynamic characteristics
…continued
All parameters are guaranteed for V
BAT
= 4.45 V to 60 V; V
CC
= 4.45 V to 5.25 V; V
BUF
= 4.45 V to 5.25 V; V
IO
= 2.55 V to
5.25 V; T
vj
=
40
C to + 150
C; R
bus
= 40
, C
bus
= 100 pF; C
RXD
= 15 pF; C
TRXD0
= C
TRXD1
= 50 pF and C
SDO
= 50 pF
unless otherwise specified. All voltages are defined with respect to ground; positive currents flow into the IC.
Symbol Parameter Conditions Min Typ Max Unit

TJA1086GHN/0Z

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Interface - Specialized TJA1086GHN/HVQFN44//0/REEL 13 Q1 NDP SSB
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet