8535AGI-01 www.idt.com REV. F MAY 28, 2013
1
Low Skew, 1-to-4 LVCMOS/LVTTL-to-3.3V
LVPECL Fanout Buffer
ICS8535I-01
GENERAL DESCRIPTION
The ICS8535I-01 is a low skew, high performance 1-to-4
LVCMOS/LVTTL-to-3.3V LVPECL fanout buffer. The
ICS8535I-01 has two single ended clock inputs. the single
ended clock input accepts LVCMOS or LVTTL input levels
and translate them to 3.3V LVPECL levels. The clock
enable is internally synchronized to eliminate runt clock
pulses on the output during asynchronous assertion/
deassertion of the clock enable pin.
Guaranteed output and part-to-part skew characteristics
make the ICS8535I-01 ideal for those applications demand-
ing well defined performance and repeatability.
FEATURES
• Four differential 3.3V LVPECL outputs
• Selectable CLK0 or CLK1 inputs for redundant
and multiple frequency fanout applications
• CLK0 or CLK1 can accept the following input levels:
LVCMOS or LVTTL
• Maximum output frequency: 266MHz
• Translates LVCMOS and LVTTL levels to
3.3V LVPECL levels
• Output skew: 30ps (maximum)
• Part-to-part skew: 250ps (maximum)
• Propagation delay: 1.9ns (maximum)
• Jitter, RMS: < 0.09ps (typical)
• 3.3V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS compliant
packages
BLOCK DIAGRAM PIN ASSIGNMENT
ICS8535I-01
20-Lead TSSOP
4.4mm x 6.5mm x 0.92mm body package
G Package
Top View
CLK0
CLK1
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
0
1
CLK_EN
CLK_SEL
D
Q
LE
V
EE
CLK_EN
CLK_SEL
CLK0
nc
CLK1
nc
nc
nc
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q0
nQ0
V
CC
Q1
nQ1
Q2
nQ2
V
CC
Q3
nQ3
