CRX14 Applying the I²C protocol to the CRX14 registers
Doc ID 8880 Rev 4 23/47
5.2 I²C input/output frame register protocol
Figure 13 shows how to store a PICC request frame command of N Bytes into the
Input/Output Frame Register.
After the I²C STOP condition, the request frame is RF transmitted in the ISO14443 type-B
format. The CRX14 then waits for the PICC answer frame which will also be stored in the
Input/Output Frame Register. The request frame is over-written by the answer frame.
Figure 14 shows how to read an N-Byte PICC answer frame.
The two CRC Bytes generated by the PICC are not stored.
The CRX14 continues to output data Bytes until a NoACK has been generated by the I²C
Host, and received by the CRX14. After all 36 Bytes have been output, the CRX14 “rolls
over”, and starts outputting from the start of the Input/Output Frame Register again.
The CRX14 supports the I²C Current Address and Random Address Read modes. The
Current Address Read mode can be used if the previous command was issued to the
register where the Read is to take place.
Figure 13. Host-to-CRX14 transfer: I²C write to I/O frame register for ISO14443B
Figure 14. CRX14-to-host transfer: I²C random address read from I/O frame register for
ISO14443B
S
T
A
R
T
1 0 1 0 XX X 01h N
S
T
O
P
ACK
ACKACK
Request Frame
Length N
Input/Output
Register
Address
Device
Select
Code
Bus
Master
CRX14
Write
Bus
Slave
ai09243
R/W
Data 1 Data 2
PICC
Command
Parameter
PICC
Command
Code
Data N
PICC
Command
Parameter
PICC
Command
Parameter
ACK
ACKACKACK
S
T
A
R
T
1010XXX 01h N
S
T
O
P
ACK
ACKACK
Received
Frame
Length
Input/Output
Register
Address
Device
Select
Code
Bus
Master
CRX14
Read
Bus
Slave
ai09243
R/W
Data1 Data 2
Answer
Frame
Data
Answer
Frame
Data
Data N
Answer
Frame
Data
Answer
Frame
Data
NoACK
ACKACKACK
R
E
S
T
A
R
T
10 1 0 XXX
Device
Select
Code
R/W
ACK