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MAX4950CTO+T

P1-P3P4-P6P7-P9P10-P10
MAX4950
Quad PCI Express Equalizer/Redriver
4 _______________________________________________________________________________________
Note 3: All devices are 100% production tested at T
A
= +70°C. Specifications for all temperature limits are guaranteed by design.
Note 4: Currents are applicable for both PCIe Generation I and Generation II speeds. Power-saving mode (P_SAV), where electrical
idle and receiver detection are only performed on channel 0 and reduced output swing (O_AMP) reduces this current. Table
5 summarizes the predicted power consumption.
Note 5: Guaranteed by design, unless otherwise noted.
Note 6: Equivalent to same amount of deemphasis driving the input.
Note 7: Rise and fall times are measured using 20% and 80% levels.
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +3.0V to +3.6V, C
CL
= 75nF coupling capacitor on each output, R
L
= 50Ω resistor on each output, T
A
= 0°C to +70°C, unless
otherwise noted. Typical values are at V
CC
= +3.3V and T
A
= +25°C.) (Note 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Electrical Idle Detect
Threshold
V
TX-IDLE-
THRESH
Squarewave input at 500MHz 65 85 120 mV
P-P
Output Voltage During
Electrical Idle (AC)
V
TX-IDLE-DIFF-
AC-P
|(V
OUT_P
- V
OUT_N
)|, f = 2.5GHz 20 mV
P-P
Receiver Detect Pulse
Amplitude
V
TX-RCV-
DETECT
Voltage change in positive direction 600 mV
Receiver Detect Pulse Width 100 ns
Receiver Detect Retry Period 200 ns
CONTROL LOGIC (INEQ1, INEQ0, OEQ1, OEQ0, EN, RX_DET, O_AMP, P_SAV)
Input Logic-Level Low V
IL
0.6 V
Input Logic-Level High V
IH
1.4 V
Input Logic Hysteresis V
HYST
130 mV
Input Leakage Current I
IN
V
CONTROL_LOGIC
= +0.5V or +1.5V -50 +50 µA
ESD PROTECTION
All Pins Human Body Model (HBM) ±2 kV
DE dB
V
V
HIGH P P
LOW P P
() log
_
_
=
⎛
⎝
⎜
⎞
⎠
⎟
⎡
⎣
⎢
⎢
⎤
⎦
−
−
20
⎥⎥
⎥
Timing Diagram
V
LOW_P-P
V
HIGH_P-P
Figure 1. Illustration of Output Deemphasis
MAX4950
Quad PCI Express Equalizer/Redriver
_______________________________________________________________________________________ 5
INEQ0 = INEQ1 = 0, O_AMP = 0,
V
IN
= 200mV
P-P
, OEQ0 = 0, OEQ1 = 0
MAX4950 toc01
0ps 50ps 100ps 150ps-150ps-100ps -50ps
0
200
400
600
-600
-400
-200
EYE DIAGRAM VOLTAGE (mV)
INEQ0 = INEQ1 = 0, O_AMP = 0,
V
IN
= 200mV
P-P
, OEQ0 = 1, OEQ1 = 0
MAX4950 toc02
0ps 50ps 100ps 150ps-150ps-100ps -50ps
0
200
400
600
-600
-400
-200
EYE DIAGRAM VOLTAGE (mV)
INEQ0 = INEQ1 = 0, O_AMP = 0,
V
IN
= 200mV
P-P
, OEQ0 = 0, OEQ1 = 1
MAX4950 toc03
0ps 50ps 100ps 150ps-150ps-100ps -50ps
0
100
300
200
400
500
-500
-300
-400
-200
-100
EYE DIAGRAM VOLTAGE (mV)
Typical Operating Characteristics
(V
CC
= +3.3V and T
A
= +25°C, unless otherwise noted. All eye diagrams measured using K28.5 pattern.)
INEQ0 = INEQ1 = 0, O_AMP = 1,
V
IN
= 200mV
P-P
, OEQ0 = 0, OEQ1 = 0
MAX4950 toc04
0ps 50ps 100ps 150ps-150ps-100ps -50ps
0
100
300
200
400
500
-500
-300
-400
-200
-100
EYE DIAGRAM VOLTAGE (mV)
INEQ0 = INEQ1 = 0, O_AMP = 1,
V
IN
= 200mV
P-P
, OEQ0 = 1, OEQ1 = 0
MAX4950 toc05
0ps 50ps 100ps 150ps-150ps-100ps -50ps
0
100
300
200
400
-400
-300
-200
-100
EYE DIAGRAM VOLTAGE (mV)
INEQ0 = INEQ1 = 0, O_AMP = 1,
V
IN
= 200mV
P-P
, OEQ0 = 0, OEQ1 = 1
MAX4950 toc06
0ps 50ps 100ps 150ps-150ps-100ps -50ps
0
100
300
200
400
-400
-300
-200
-100
EYE DIAGRAM VOLTAGE (mV)
INEQ0 = 1, INEQ1 = 0, O_AMP = 0, V
IN
= 500mV
P-P
,
WITH 6in. STRIPLINE OEQ0 = OEQ1 = 0
MAX4950 toc07
0ps 50ps 100ps 150ps-150ps-100ps -50ps
0
400
200
600
-600
-400
-200
EYE DIAGRAM VOLTAGE (mV)
INEQ0 = 0, INEQ1 = 1, O_AMP = 0, V
IN
= 500mV
P-P
,
WITH 19in. STRIPLINE OEQ0 = OEQ1 = 0
MAX4950 toc08
0ps 50ps 100ps 150ps-150ps-100ps -50ps
0
400
200
600
-600
-400
-200
EYE DIAGRAM VOLTAGE (mV)
INEQ0 = 0, INEQ1 = 1, O_AMP = 0, V
IN
= 500mV
P-P
,
WITH 19IN. STRIPLINE OEQ0 = OEQ1 = 0
MAX4950 toc09
0ps 50ps 100ps 150ps-150ps-100ps -50ps
0
400
200
600
-600
-400
-200
EYE DIAGRAM VOLTAGE (mV)
MAX4950
Quad PCI Express Equalizer/Redriver
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(V
CC
= +3.3V and T
A
= +25°C, unless otherwise noted. All eye diagrams measured using K28.5 pattern.)
INEQ0 = INEQ1 = 0, O_AMP = 1, V
IN
= 200mV
P-P
,
OEQ0 = 1, OEQ1 = 0, OUTPUT AFTER 6IN. STRIPLINE
MAX4950 toc10
0ps 50ps 100ps 150ps-150ps-100ps -50ps
0
100
300
200
400
-400
-300
-200
-100
EYE DIAGRAM VOLTAGE (mV)
INEQ0 = INEQ1 = 0, O_AMP = 0, V
IN
= 200mV
P-P
,
OEQ0 = 0, OEQ1 = 1, OUTPUT AFTER 19IN. STRIPLINE
MAX4950 toc11
0ps 50ps 100ps 150ps-150ps-100ps -50ps
0
50
150
100
200
250
-250
-150
-200
-100
-50
EYE DIAGRAM VOLTAGE (mV)
INEQ0 = INEQ1 = 0, O_AMP = 0, V
IN
= 200mV
P-P
,
OEQ0 = 0, OEQ1 = 0, OUTPUT AFTER 19IN. STRIPLINE
MAX4950 toc12
0ps 50ps 100ps 150ps-150ps-100ps -50ps
0
100
300
200
400
500
-500
-300
-400
-200
-100
EYE DIAGRAM VOLTAGE (mV)
Pin Description
PIN NAME FUNCTION
1, 9, 17, 22,
30, 38
V
CC
Power-Supply Input. Bypass V
CC
to GND with 1µF and .01µF capacitors in parallel as close to the
device as possible.
2, 5, 8, 10,13,
16, 23, 26, 29,
31, 34, 37
GND Ground
3 IN0P Noninverting Input 0
4 IN0N Inverting Input 0
6 IN1P Noninverting Input 1
7 IN1N Inverting Input 1
11 IN2P Noninverting Input 2
12 IN2N Inverting Input 2
14 IN3P Noninverting Input 3
15 IN3N Inverting Input 3
18 INEQ1 Inp ut E q ual i zati on C ontr ol M S B. IN E Q1 i s i nter nal l y p ul l ed d ow n b y 60kΩ ( typ ) r esi stor . S ee Tab l e 2.
19 INEQ0 Input Equalization Control LSB. INEQ0 is internally pulled down by 60kΩ (typ) resistor. See Table 2.
20 OEQ1 O utp ut D eem p hasi s C ontr ol M S B. O E Q 1 i s i nter nal l y p ul l ed d ow n b y 60kΩ ( typ ) r esi stor . S ee Tab l e 3.
21 OEQ0 O utp ut D eem p hasi s C ontr ol LS B. O E Q 0 i s i nter nal l y p ul l ed d ow n b y 60kΩ ( typ ) r esi stor . S ee Tab l e 3.
24 OUT3N Inverting Output 3
25 OUT3P Noninverting Output 3
27 OUT2N Inverting Output 2
28 OUT2P Noninverting Output 2
P1-P3P4-P6P7-P9P10-P10

MAX4950CTO+T

Mfr. #:
Buy MAX4950CTO+T
Manufacturer:
Maxim Integrated
Description:
Interface - Signal Buffers, Repeaters Quad PCI Express Equalizer/Re-Driver
Lifecycle:
New from this manufacturer.
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