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1EDI30I12MHXUMA1

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
3.3 Protection Features
3.3.1 Undervoltage Lockout (UVLO)
OUT
IN+
VCC2
VCC1
V
UVLOH2
V
UVLOL2
V
UVLOH1
V
UVLOL1
Figure 4 UVLO Behavior
To ensure correct switching of IGBTs the device is equipped with an undervoltage lockout for input and output
independently. Operation starts only aer both VCC levels have increased beyond the respective V
UVLOH
levels
If the power supply voltage V
VCC1
of the input chip drops below V
UVLOL1
a
turn-o signal is sent to the output
chip before power-down. The IGBT is switched o and the signals at IN+ and IN- are ignored until V
VCC1
reaches
the power-up voltage V
UVLOH1
again.
If the power supply voltage V
VCC2
of the output chip goes down below V
UVLOL2
the IGBT is switched o and
signals from the input chip are ignored until V
VCC2
reaches the power-up voltage V
UVLOH2
again.
3.3.2 Active Shut-Down
The active shut-down feature ensures a safe IGBT o-state if the output chip is not connected to the power
supply or an undervoltage lockout is in
eect. The IGBT gate is clamped at OUT to GND2.
3.3.3 Short Circuit Clamping
During short circuit the IGBT’s gate voltage tends to rise because of the feedback via the Miller capacitance. An
additional protection circuit connected to OUT and CLAMP limits this voltage to a value slightly higher than the
supply voltage. A maximum current of 500 mA may be fed back to the supply through one of these paths for
10 μs. If higher currents are expected or tighter clamping is desired external Schottky diodes may be added.
3.3.4 Active Miller Clamp
In a half bridge configuration the switched o IGBT tends to dynamically turn on during turn on phase of the
opposite IGBT. A Miller clamp allows sinking the Miller current across a low impedance path in this high dV/dt
situation. Therefore in many applications, the use of a negative supply voltage can be avoided. During
turn-o,
the gate voltage is monitored and the clamp output is activated when the gate voltage drops below typical 2 V
(referred to GND2). The clamp is designed for a Miller current in the same range as the nominal output current.
EiceDRIVER
™
1EDI Compact
Single channel IGBT gate driver IC with clamp in wide body package
Functional Description
Datasheet 7 Rev. 2.0
2016-07-05
3.4 Non-Inverting and Inverting Inputs
OUT
IN+
IN-
Figure 5 Typical Switching Behavior
There are two possible input modes to control the IGBT. At non-inverting mode IN+ controls the driver output
while IN- is set to low. At inverting mode IN- controls the driver output while IN+ is set to high. A minimum input
pulse width is defined to filter occasional glitches.
3.5 Driver Output
The output driver section uses MOSFETs to provide a rail-to-rail output. This feature permits that tight control
of gate voltage during on-state and short circuit can be maintained as long as the driver’s supply is stable. Due
to the low internal voltage drop, switching behavior of the IGBT is predominantly governed by the gate resistor.
Furthermore, it reduces the power to be dissipated by the driver.
EiceDRIVER
™
1EDI Compact
Single channel IGBT gate driver IC with clamp in wide body package
Functional Description
Datasheet 8 Rev. 2.0
2016-07-05
4 Electrical Parameters
4.1 Absolute Maximum Ratings
Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to
destruction of the integrated circuit. Unless otherwise noted all parameters refer to GND1
Table 2 Absolute Maximum Ratings
Parameter Symbol Values Unit Note or
Test Condition
Min. Max.
Power supply output side V
VCC2
-0.3 20
1)
V
2)
Gate driver output V
OUT
V
GND2
-0.3 V
VCC2
+0.3 V
2)
Maximum short circuit clamping time t
CLP
– 10 μs I
CLAMP/OUT
= 500 mA
Positive power supply input side V
VCC1
-0.3 18.0 V –
Logic input voltages (IN+,IN-) V
LogicIN
-0.3 18.0 V –
Pin CLAMP voltage V
CLAMP
-0.3 V
VCC2
+0.3
1)
V
2)
Input to output isolation voltage (GND2) V
GND2
-1200 1200 V GND2 - GND1
Junction temperature T
J
-40 150 °C –
Storage temperature T
S
-55 150 °C –
Power dissipation (Input side) P
D, IN
– 25 mW
3)
@T
A
= 25°C
Power dissipation (Output side) P
D, OUT
– 400 mW
3)
@T
A
= 25°C
Thermal resistance (Input side) R
THJA,IN
– 145 K/W
3)
@T
A
= 85°C
Thermal resistance (Output side) R
THJA,OUT
– 165 K/W
3)
@T
A
= 85°C
ESD capability V
ESD,HBM
– 2 kV Human body model
4)
V
ESD,CDM
– 1 kV Charged device
model
5)
1
May be exceeded during short circuit clamping.
2
With respect to GND2.
3
See Figure 9 for reference layouts for these thermal data. Thermal performance may change significantly
with layout and heat dissipation of components in close proximity.
4
According to EIA/JESD22-A114-C (discharging a 100 pF capacitor through a 1.5 kΩ series resistor).
5
According to EIA/JESD22-C101 (specified waveform characteristics)
EiceDRIVER
™
1EDI Compact
Single channel IGBT gate driver IC with clamp in wide body package
Electrical Parameters
Datasheet 9 Rev. 2.0
2016-07-05
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

1EDI30I12MHXUMA1

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Manufacturer:
Infineon Technologies
Description:
Gate Drivers
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