AD8591/AD8592/AD8594
Rev. B | Page 11 of 16
THEORY OF OPERATION
The AD859x amplifiers are CMOS, high output drive, rail-to-
rail input and output single-supply amplifiers designed for low
cost and high output current drive. The parts include a power
saving shutdown function that makes the AD8591/AD8592/
AD8594 op amps ideal for portable multimedia and
telecommunications applications.
Figure 33 shows the simplified schematic for the AD8591/AD8592/
AD8594 amplifiers. Two input differential pairs, consisting of
an n-channel pair (M1, M2) and a p-channel pair (M3, M4),
provide a rail-to-rail input common-mode range. The outputs of
the input differential pairs are combined in a compound folded-
cascode stage that drives the input to a second differential pair
gain stage. The outputs of the second gain stage provide the gate
voltage drive to the rail-to-rail output stage.
The rail-to-rail output stage consists of M15 and M16, which
are configured in a complementary common source configuration.
As with any rail-to-rail output amplifier, the gain of the output
stage, and thus the open-loop gain of the amplifier, is dependent
on the load resistance. In addition, the maximum output voltage
swing is directly proportional to the load current. The difference
between the maximum output voltage to the supply rails, known as
the dropout voltage, is determined by the on-channel resistance
of the AD8591/AD8592/AD8594 output transistors. The output
dropout voltage is given in Figure 5 and Figure 6.
50µA
100µA
100µA
20µA
V
B2
M5
M8
M12
M15
M16
M11
OUT
M3
M4
M1
IN–
IN+
V
B3
M6
M7 M10
20µA
M13
50µA
+
V–
M9
M14
M2
*
*
**
M337
SD
INV
*
*
M340
*ALL CURRENT SOURCES GO TO 0µA IN SHUTDOWN MODE.
INV
M31
M30
01106-034
Figure 33. Simplified Schematic
INPUT VOLTAGE PROTECTION
Although not shown in the simplified schematic, ESD protection
diodes are connected from each input to each power supply rail.
These diodes are normally reverse-biased, but turn on if either
input voltage exceeds either supply rail by more than 0.6 V. If this
condition occurs, limit the input current to less than ±5 mA.
This is done by placing a resistor in series with the input(s).
The minimum resistor value should be
mA5
,MAXIN
IN
V
R ≥
(1)
OUTPUT PHASE REVERSAL
The AD8591/AD8592/AD8594 are immune to output voltage
phase reversal with an input voltage within the supply voltages
of the device. However, if either of the inputs of the device exceeds
0.6 V outside of the supply rails, the output could exhibit phase
reversal. This is due to the ESD protection diodes becoming
forward-biased, thus causing the polarity of the input terminals
of the device to switch.
The technique recommended in the Input Voltage Protection
section should be applied in applications where the possibility
of input voltages exceeding the supply voltages exists.
OUTPUT SHORT-CIRCUIT PROTECTION
To achieve high output current drive and rail-to-rail performance,
the outputs of the AD859x family do not have internal short-
circuit protection circuitry. Although these amplifiers are
designed to sink or source as much as 250 mA of output current,
shorting the output directly to the positive supply could damage or
destroy the device. To protect the output stage, limit the maximum
output current to ±250 mA.
By placing a resistor in series with the output of the amplifier,
as shown in Figure 34, the output current can be limited. The
minimum value for R
X
is
mA250
SY
X
V
R ≥ (2)
For a 5 V single-supply application, R
X
should be at least 20 Ω.
Because R
X
is inside the feedback loop, V
OUT
is not affected. The
trade-off in using R
X
is a slight reduction in output voltage
swing under heavy output current loads. R
X
also increases the
effective output impedance of the amplifier to R
O
+ R
X
, where R
O
is the output impedance of the device.
R
X
20Ω
V
OUT
AD8592
+5
V
IN
01106-035
Figure 34. Output Short-Circuit Protection
POWER DISSIPATION
Although the AD859x amplifiers are able to provide load
currents of up to 250 mA, proper attention should be given to
not exceeding the maximum junction temperature for the device.
The junction temperature equation is
T
J
= P
DISS
× θ
JA
+ T
A
(3)
where:
T
J
is the AD859x junction temperature.
P
DISS
is the AD859x power dissipation.
θ
JA
is the AD859x junction-to-ambient thermal resistance of the
package.
T
A
is the ambient temperature of the circuit.
