AD8591/AD8592/AD8594
Rev. B | Page 14 of 16
The U1-A amplifier is configured as a unity-gain buffer driving
a 1 nF capacitor. The input signal is connected to the noninverting
input, and the sample clock controls the shutdown for that
amplifier. When the sample clock is high, the U1-A amplifier is
active and the output follows V
IN
. When the sample clock goes
low, U1-A shuts down with the output of the amplifier going to
a high impedance state, holding the voltage on the C1 capacitor.
SINGLE-SUPPLY DIFFERENTIAL LINE DRIVER
Figure 43 shows a single-supply differential line driver circuit
that can drive a 600 Ω load with less than 0.7% distortion from
20 Hz to 15 kHz with an input signal of 4 V p-p and a single 5 V
supply. The design uses an AD8594 to mimic the performance
of a fully balanced transformer-based solution. However, this
design occupies much less board space, while maintaining low
distortion, and can operate down to dc. Like the transformer-based
design, either output can be shorted to ground for unbalanced
line driver applications without changing the circuit gain of 1.
The U1-B amplifier is used as a unity-gain buffer to prevent
loading on C1. Because of the low input bias current of the U1-B
CMOS input stage and the high impedance state of the U1-A
output in shutdown, there is little voltage droop from C1 during
the hold period. This circuit can be used with sample frequencies as
high as 500 kHz and as low as 1 Hz. By increasing the C1 value,
lower voltage droop is achieved for very low sample rates.
R
L
600Ω
C1
22µF
A2
9
8
7
3
1
2
A1
+5V
R1
10kΩ
R2
10kΩ
R11
10kΩ
R7
10kΩ
8
7
A1
+5V
+5V
R8
100kΩ
R9
100kΩ
C2
1µF
R12
10kΩ
R14
50Ω
A2
1
2
3
3
10kΩ
R6
10kΩ
R13
10kΩ
C3
47µF
V
O1
V
O2
C4
47µF
A1, A2 = 1/2 AD8592
GAIN =
R3
R2
SET: R7, R10, R11 = R2
SET: R6, R12, R13 = R3
V
IN
R10
10kΩ
R5
50Ω
10
4
10
4
9
1106-044
DIRECT ACCESS ARRANGEMENT FOR PCMCIA
MODEMS (TELEPHONE LINE INTERFACE)
Figure 42 illustrates a 5 V transmit/receive telephone line
interface for 600 Ω systems. It allows full duplex transmission
of signals on a transformer-coupled 600 Ω line in a differential
manner. Amplifier A1 provides gain that can be adjusted to
meet the modem output drive requirements. Both A1 and A2
are configured to apply the largest possible signal on a single
supply to the transformer. Because of the high output current
drive and low dropout voltages of the AD8594, the largest signal
available on a single 5 V supply is approximately 4.5 V p-p into
a 600 Ω transmission system. Amplifier A3 is configured as a
difference amplifier for two reasons. It prevents the transmit
signal from interfering with the receive signal, and it extracts
the receive signal from the transmission line for amplification
by A4. The gain of A4 can be adjusted in the same manner as
the gain of A1 to meet the input signal requirements of the
modem. Standard resistor values permit the use of single
inline package (SIP) format resistor arrays. Couple this with
the 16-lead TSSOP or SOIC footprint of the AD8594, and this
circuit offers a compact, cost-effective solution.
Figure 43. Low Noise, Single-Supply Differential Line Driver
R8 and R9 set up the common-mode output voltage equal to
half of the supply voltage. C1 is used to couple the input signal
and can be omitted if the dc voltage of the input is equal to half
of the supply voltage.
The circuit can also be configured to provide additional gain, if
desired. The gain of the circuit is
2
3
R
R
V
V
A
IN
OUT
V
== (7)
R7
10kΩ
R8
10kΩ
+5V
6.2V
6.2V
TRANSMIT
TxA
RECEIVE
RxA
C1
0.1µF
R1
10kΩ
R2
9.09kΩ
2kΩ
P1
Tx GAIN
ADJUST
A1
A2
A3
A4
A1, A2 = 1/4 AD8594
A3, A4 = 1/4 AD8594
R3
360Ω
1:1
T1
TO TELEPHONE
LINE
1
2
3
7
6
5
11
12
10
15
14
16
R5
10kΩ
R6
10kΩ
R9
10kΩ
R14
14.3kΩ
R10
10kΩ
R11
10kΩ
R12
10kΩ
R13
10kΩ
C2
0.1µF
P2
Rx GAIN
ADJUST
2kΩ
Z
O
600Ω
MIDCOM
671-8005
SHUTDOWN
9
9
9
9
10µF
1106-043
where:
V
OUT
= V
O1
− V
O2
R2 = R7 = R10 = R11
R3 = R6 = R12 = R1
Figure 42. Single-Supply Direct Access Arrangement for PCMCIA Modems
