IXDD504SIA Datasheet IXDD504PI, IXDD504SIAT/R, IXDE504D2 | P10-P12

IXDD504 / IXDE504

ENABLE Propagation vs. Temperature

SUPPLY

= 15V

100

-50 0 50 100 150

Temperature (C)

ENABLE Delay Time (ns)

Positive going ENABLE to output ON

Negative going ENABLE to high impedance state

Fig. 28

Ref

Figure 32 - Typical Application Short Circuit di/dt Limit

ENABLE Threshold vs. Supply Voltage

0.5

1.5

2.5

0 5 10 15 20 25 30 35

Supply Voltage (V)

Positive Going Level (V)

Positive going input

Negative going input

ENABLE Threshold vs. Temperature

SUPPLY

= 15V

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

-50 0 50 100 150

Temperature (C)

Enable Threshold (V)

Positive going input

Negative going input

ENABLE Propagation Time vs. Supply Voltage

100

150

200

250

300

350

400

0 5 10 15 20 25 30 35

Supply Voltage (V)

ENABLE Delay Time (ns)

Positve going ENABLE to output ON

Negative going ENABLE to high impedance state

Fig. 29

Fig. 30 Fig. 31

IXDD504 / IXDE504

APPLICATIONS INFORMATION

Short Circuit di/dt Limit

A short circuit in a high-power MOSFET such as the IXFN100N20,

(20A, 1000V), as shown in Figure 32, can cause the current

through the module to flow in excess of 60A for 10µs or more

prior to self-destruction due to thermal runaway. For this

reason, some protection circuitry is needed to turn off the

MOSFET module. However, if the module is switched off too

fast, there is a danger of voltage transients occuring on the

drain due to Ldi/dt, (where L represents total inductance in

series with drain). If these voltage transients exceed the

MOSFET's voltage rating, this can cause an avalanche break-

down.

The IXDD504 and IXDE504 have the unique capability, with

additional circuitry, to softly switch off the high-power MOSFET

module, significantly reducing these Ldi/dt transients.

Thus, the IXDD504 & IXDE504 help to prevent device destruc-

tion from both dangers; over-current, and avalanche break-

down due to di/dt induced over-voltage transients.

The IXDD504 & IXDE504 are designed to not only provide ±4A

per output under normal conditions, but also to allow their

outputs to go into a high impedance state. This permits the

IXDD504 or IXDE504 outputs to control a separate weak pull-

down circuit during detected overcurrent shutdown conditions

to limit and separately control d

VGS

/dt gate turnoff. This circuit

is shown in Figure 33.

Referring to Figure 33, the protection circuitry should include

a comparator, whose positive input is connected to the source

of the IXFN100N20. A low pass filter should be added to the

input of the comparator to eliminate any glitches in voltage

caused by the inductance of the wire connecting the source

resistor to ground. (Those glitches might cause false triggering

of the comparator).

The comparator's output should be connected to a SRFF(

Set

Reset Flip Flop). The flip-flop controls both the Enable signal,

and the low power MOSFET gate. Please note that CMOS 4000-

series devices operate with a V

range from 3 to 15 VDC, (with

18 VDC being the maximum allowable limit).

A low power MOSFET, such as the 2N7002, in series with a

resistor, will enable the IXFN100N20 gate voltage to drop

gradually. The resistor should be chosen so that the RC time

constant will be 100us, where "C" is the Miller capacitance of

the IXFN100N20.

For resuming normal operation, a Reset signal is needed at

the SRFF's input to enable the IXDD504 again. This Reset can

be generated by connecting a One Shot circuit between the

IXDD504 Input signal and the SRFF restart input. The One Shot

will create a pulse on the rise of the IXDD504 input, and this

pulse will reset the SRFF outputs to normal operation.

When a short circuit occurs, the voltage drop across the low-

value, current-sensing resistor, (Rs=0.005 Ohm), connected

between the MOSFET Source and ground, increases. This

triggers the comparator at a preset level. The SRFF drives a low

input into the Enable pin disabling the IXDD504 output. The

SRFF also turns on the low power MOSFET, (2N7000).

In this way, the high-power MOSFET module is softly turned off

by the IXDD504, preventing its destruction.

10uH

0.1

20nH

10k

R+

IXFN100N20

Rcomp

100pF

C+

V+

V-

Comp

LM339

1600

Rsh

Ccomp

1pF

VCC

DGND

OUT

IXDD504

VIN

VCC

REF

CD4001A

NOR2

Ros

NOT2

CD4049A

CD4011A

NAND

CD4049A

NOT1

CD4001A

NOR1

CD4049A

NOT3

Low_Power

2N7000

1pF

Cos

One Shot

Circuit

SR Flip-Flop

Figure 33 - Application Test Diagram

IXDD504 / IXDE504

When designing a circuit to drive a high speed MOSFET

utilizing the IXDD504 or IXDE504, it is very important to keep

certain design criteria in mind, in order to optimize performance

of the driver. Particular attention needs to be paid to Supply

Bypassing, Grounding, and minimizing the Output Lead

Inductance.

Say, for example, we are using the IXDD504 to charge a

2500pF capacitive load from 0 to 25 volts in 25ns.

Using the formula: I

= C (∆V / ∆t), where ∆V=25V C=2500pF

and ∆t=25ns we can determine that to charge 2500pF to 25

volts in 25ns will take a constant current of 2.5A. (In reality, the

charging current won’t be constant, and will peak somewhere

around 4A).

SUPPLY BYPASSING

In order for our design to turn the load on properly, the IXDD504

must be able to draw this 2.5A of current from the power supply

in the 25ns. This means that there must be very low impedance

between the driver and the power supply. The most common

method of achieving this low impedance is to bypass the

power supply at the driver with a capacitance value that is a

magnitude larger than the load capacitance. Usually, this

would be achieved by placing two different types of bypassing

capacitors, with complementary impedance curves, very close

to the driver itself. (These capacitors should be carefully

selected, low inductance, low resistance, high-pulse current-

service capacitors). Lead lengths may radiate at high frequency

due to inductance, so care should be taken to keep the lengths

of the leads between these bypass capacitors and the IXDD504

to an absolute minimum.

GROUNDING

In order for the design to turn the load off properly, the IXDD504

must be able to drain this 2.5A of current into an adequate

grounding system. There are three paths for returning current

that need to be considered: Path #1 is between the IXDD504

and it’s load. Path #2 is between the IXDD504 and it’s power

supply. Path #3 is between the IXDD504 and whatever logic

is driving it. All three of these paths should be as low in

resistance and inductance as possible, and thus as short as

practical. In addition, every effort should be made to keep

these three ground paths distinctly separate. Otherwise, (for

instance), the returning ground current from the load may

develop a voltage that would have a detrimental effect on the

logic line driving the IXDD504.

OUTPUT LEAD INDUCTANCE

Of equal importance to Supply Bypassing and Grounding are

issues related to the Output Lead Inductance. Every effort

should be made to keep the leads between the driver and it’s

load as short and wide as possible. If the driver must be

placed farther than 0.2” from the load, then the output leads

should be treated as transmission lines. In this case, a

twisted-pair should be considered, and the return line of each

twisted pair should be placed as close as possible to

the

ground pin of the driver, and connect directly to the ground

terminal of the load.

Supply Bypassing and Grounding Practices, Output Lead inductance

P1-P3 P4-P6 P7-P9 P10-P12 P13-P13

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