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M27W801 Summary description
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Figure 4. TSOP connections
A1
A0
Q0
A7
A4 A3
A2
A6
A5
A13
A10
A8
A9
Q7
A14
A11 GV
PP
E
Q5
Q1
Q2
Q3
Q4
Q6
A17
A18
A16
A12
A19
V
CC
A15
AI02366
M27W801
(Normal)
8
1
9
16 17
24
25
32
V
SS
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Device operation M27W801
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2 Device operation
The operating modes of the M27W801 are listed in the Operating Modes table. A single
power supply is required in the read mode. All inputs are TTL levels except for G
V
PP
and
12V on A9 for Electronic Signature and Margin Mode Set or Reset.
2.1 Read mode
The M27W801 has two control functions, both of which must be logically active in order to
obtain data at the outputs. Chip Enable (E
) is the power control and should be used for
device selection. Output Enable (G
) is the output control and should be used to gate data to
the output pins, independent of device selection. Assuming that the addresses are stable,
the address access time (t
AVQV
) is equal to the delay from E to output (t
ELQV
). Data is
available at the output after a delay of t
GLQV
from the falling edge of G, assuming that E has
been low and the addresses have been stable for at least t
AVQV
-t
GLQV
.
2.2 Standby mode
The M27W801 has a standby mode which reduces the supply current from 15mA to 20µA
with low voltage operation V
CC
3.6V, see Read Mode DC Characteristics table for details.
The M27W801 is placed in the standby mode by applying a CMOS high signal to the E
input. When in the standby mode, the outputs are in a high impedance state, independent of
the G
V
PP
input.
2.3 Two Line Output Control
Because EPROMs are usually used in larger memory arrays, the product features a 2 line
control function which accommodates the use of multiple memory connection. The two line
control function allows:
the lowest possible memory power dissipation
complete assurance that output bus contention will not occur
For the most efficient use of these two control lines, E
should be decoded and used as the
primary device selecting function, while G
should be made a common connection to all
devices in the array and connected to the READ
line from the system control bus. This
ensures that all deselected memory devices are in their low power standby mode and that
the output pins are only active when data is required from a particular memory device.
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M27W801 Device operation
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2.4 System considerations
The power switching characteristics of Advanced CMOS EPROMs require careful
decoupling of the devices. The supply current, I
CC
, has three segments that are of interest to
the system designer: the standby current level, the active current level, and transient current
peaks that are produced by the falling and rising edges of E
. The magnitude of the transient
current peaks is dependent on the capacitive and inductive loading of the device at the
output. The associated transient voltage peaks can be suppressed by complying with the
two line output control and by properly selected decoupling capacitors. It is recommended
that a 0.1µF ceramic capacitor be used on every device between V
CC
and V
SS
. This should
be a high frequency capacitor of low inherent inductance and should be placed as close to
the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used
between V
CC
and V
SS
for every eight devices. The bulk capacitor should be located near the
power supply connection point. The purpose of the bulk capacitor is to overcome the voltage
drop caused by the inductive effects of PCB traces.
2.5 Programming
The M27W801 has been designed to be fully compatible with the M27C801 and has the
same electronic signature. As a result the M27W801 can be programmed as the M27C801
on the same programming equipment applying 12.75V on V
PP
and 6.25V on V
CC
by the use
of the same PRESTO IIB algorithm. When delivered (and after each ‘1’s erasure for UV
EPROM), all bits of the M27W801 are in the "1" state. Data is introduced by selectively
programming "0"s into the desired bit locations.Although only '0' will be programmed, both
"1" and "0" can be present in the data word. The only way to change a ‘0’ to a ‘1’ is by die
exposure to ultraviolet light (UV EPROM). The M27W801 is in the programming mode when
V
PP
input is at 12.75V and E is pulsed to V
IL
. The data to be programmed is applied to 8 bits
in parallel to the data output pins. The levels required for the address and data inputs are
TTL. V
CC
is specified to be 6.25V ± 0.25V.
2.6 PRESTO IIB programming algorithm
PRESTO IIB Programming Algorithm allows the whole array to be programmed with a
guaranteed margin, in a typical time of 52.5 seconds. This can be achieved with
STMicroelectronics M27W801 due to several design innovations to improve programming
efficiency and to provide adequate margin for reliability. Before starting the programming the
internal MARGIN MODE circuit must be set in order to guarantee that each cell is
programmed with enough margin. Then a sequence of 50µs program pulses are applied to
each byte until a correct verify occurs (see Figure 5). No overprogram pulses are applied
since the verify in MARGIN MODE at V
CC
much higher than 3.6V, provides the necessary
margin.
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M27W801-100K6

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
EPROM 8M (1Mx8) 100ns
Lifecycle:
New from this manufacturer.
Delivery:
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