LTC6404
19
6404f
APPLICATIONS INFORMATION
Functional Description
The LTC6404 is a small outline, wide band, low noise,
and low distortion fully-differential amplifi er with accurate
output phase balancing. The LTC6404 is optimized to drive
low voltage, single-supply, differential input 14-bit to 18-bit
analog-to-digital converters (ADCs). The LTC6404’s output
is capable of swinging rail-to-rail on supplies as low as
2.7V, which makes the amplifi er ideal for converting ground
referenced, single-ended signals into DC level-shifted
differential signals in preparation for driving low voltage,
single-supply, differential input ADCs. Unlike traditional
op amps which have a single output, the LTC6404 has
two outputs to process signals differentially. This allows
for two times the signal swing in low voltage systems
when compared to single-ended output amplifi ers. The
balanced differential nature of the amplifi er also provides
even-order harmonic distortion cancellation, and less
susceptibility to common mode noise (e.g., power supply
noise). The LTC6404 can be used as a single-ended input
to differential output amplifi er, or as a differential input to
differential output amplifi er.
The LTC6404’s output common mode voltage, defi ned
as the average of the two output voltages, is independent
of the input common mode voltage, and is adjusted by
applying a voltage on the V
OCM
pin. If the pin is left open,
there is an internal resistive voltage divider that develops
a potential halfway between the V
+
and V
pins. Whenever
this pin is not hard tied to a low impedance ground plane,
it is recommended that a high quality ceramic capacitor is
used to bypass the V
OCM
pin to a low impedance ground
plane (See Layout Considerations in this document). The
LTC6404’s internal common mode feedback path forces
accurate output phase balancing to reduce even order
harmonics, and centers each individual output about the
potential set by the V
OCM
pin.
VV
VV
OUTCM OCM
OUT OUT
==
+
+
2
The outputs (OUT
+
and OUT
) of the LTC6404 are capable
of swinging rail-to-rail. They can source or sink up to ap-
proximately 65mA of current.
Additional outputs (OUTF
+
and OUTF
) are available that
provide fi ltered versions of the OUT
+
and OUT
outputs. An
on-chip single pole RC passive fi lter band limits the fi ltered
outputs to a –3dB frequency of 88.5MHz. The user has a
choice of using the unfi ltered outputs, the fi ltered outputs,
or modifying the fi ltered outputs to adjust the frequency
response by adding additional components.
In applications where the full bandwidth of the LTC6404 is
desired, the unfi ltered outputs (OUT
+
and OUT
) should be
used. The unfi ltered outputs OUT
+
and OUT
are designed
to drive 10pF to ground (or 5pF differentially). Capacitances
greater than 10pF will produce excess peaking, and can
be mitigated by placing at least 25Ω in series with each
output pin.
Input Pin Protection
The LTC6404’s input stage is protected against differential
input voltages which exceed 1.4V by two pairs of back-
to-back diodes connected in anti-parallel series between
IN
+
and IN
(Pins 6 and 15). In addition, the input pins
have steering diodes to either power supply. If the input
pair is overdriven, the current should be limited to under
10mA to prevent damage to the IC. The LTC6404 also has
steering diodes to either power supply on the V
OCM
and
SHDN pins (Pins 4 and 1), and if forced to voltages which
exceed either supply, they too, should be current-limited
to under 10mA.
SHDN Pin
If the SHDN pin (Pin 1) is pulled 2.1V below the posi-
tive supply, circuitry is activated which powers down
the LTC6404. The pin will have the Thevenin equivalent
impedance of approximately 66kΩ to V
+
. If the pin is left
unconnected, an internal pull-up resistor of 150k will
keep the part in normal active operation. Care should
be taken to control leakage currents at this pin to under
1µA to prevent inadvertently putting the LTC6404 into
shutdown. In shutdown, all biasing current sources are
shut off, and the output pins, OUT
+
and OUT
, will each
appear as open collectors with a non-linear capacitor in
parallel and steering diodes to either supply. Because of
the non-linear capacitance, the outputs still have the ability
to sink and source small amounts of transient current if
driven by signifi cant voltage transients. The inputs (IN
+
,
and IN
) appear as anti-parallel diodes which can conduct
LTC6404
20
6404f
APPLICATIONS INFORMATION
if voltage transients at the input exceed 1.4V. The inputs
also have steering diodes to either supply. The turn-on and
turn-off time between the shutdown and active states is
typically less than 1µs.
General Amplifi er Applications
As levels of integration have increased and correspond-
ingly, system supply voltages decreased, there has been
a need for ADCs to process signals differentially in order
to maintain good signal to noise ratios. These ADCs are
typically supplied from a single supply voltage which
can be as low as 3V (2.7V min), and will have an optimal
common mode input range near mid-supply. The LTC6404
makes interfacing to these ADCs easy, by providing both
single-ended to differential conversion as well as com-
mon mode level shifting. The front page of this data sheet
shows a typical application. Referring to Figure 1, the gain
to V
OUTDIFF
from V
INM
and V
INP
is:
VVV
R
R
VV
OUTDIFF OUT OUT
F
I
INP INM
=≈
()
+
–•
Note from the above equation, the differential output volt-
age (V
OUT
+
– V
OUT
) is completely independent of input
and output common mode voltages, or the voltage at
the common mode pin. This makes the LTC6404 ideally
suited for pre-amplifi cation, level shifting and conversion
of single ended signals to differential output signals to
drive differential input ADCs.
Effects of Resistor Pair Mismatch
In the circuit of Figure 3, it is possible the gain setting
resistors will not perfectly match. Assuming infi nite open
loop gain, the differential output relationship is given by
the equation:
VVV
R
R
V
V
OUTDIFF OUT OUT
F
I
INDIFF
AVG
I
=≅+
Δ
+
–•
β
β
NNCM
AVG
OCM
V–•
Δβ
β
where:
β
AVG
I
IF
I
IF
R
RR
R
RR
=
+
+
+
1
2
1
11
2
22
R
F
is the average of R
F1
, and R
F2
, and R
I
is the average
of R
I1
, and R
I2
.
β
AVG
is defi ned as the average feedback factor (or gain)
from the outputs to their respective inputs:
Δβ is defi ned as the difference in feedback factors:
Δ=
++
β
R
RR
R
RR
I
IF
I
IF
2
22
1
11
Figure 3. Basic Differential Amplifi er with Feedback Resistor Pair Mismatch
V
V
V
+
0.1µF
0.1µF
0.1µF
0.1µF 0.1µF
+
1
SHDN
5 6
IN
7
OUT
+
8
OUTF
+
16 15
IN
+
NC
NC
14
OUT
13
OUTF
V
OUTF
R
F2
V
OUTF
+
V
OUT
V
OUT
+
2
V
+
3
V
V
+
V
+
V
V
+
V
4
V
OCM
V
SHDN
V
VOCM
V
OCM
12
V
11
V
+
10
V
+
9
V
V
V
6404 F03
LTC6404
SHDN
0.1µF
0.01µF
R
F1
R
I2
R
I1
+
V
INP
+
V
INM
LTC6404
21
6404f
APPLICATIONS INFORMATION
V
INCM
is defi ned as the average of the two input voltages
V
INP
, and V
INM
(also called the source-referred input com-
mon mode voltage):
VVV
INCM INP INM
=+
()
1
2
and V
INDIFF
is defi ned as the difference of the input
voltages:
V
INDIFF
= V
INP
– V
INM
When the feedback ratios mismatch (Δβ), common mode
to differential conversion occurs.
Setting the differential input to zero (V
INDIFF
= 0), the de-
gree of common mode to differential conversion is given
by the equation:
VVV
VV
V
OUTDIFF OUT OUT
INCM OCM
AVG
I
=
()
Δ
+
–•
β
β
NNDIFF
=0
In general, the degree of feedback pair mismatch is a
source of common mode to differential conversion of both
signals and noise. Using 1% resistors or better will mitigate
most problems, and will provide about 34dB worst-case of
common mode rejection. Using 0.1% resistors will provide
about 54dB of common mode rejection. A low impedance
ground plane should be used as a reference for both the
input signal source, and the V
OCM
pin. A direct short of
V
OCM
to this ground or bypassing the V
OCM
with a high
quality 0.1µF ceramic capacitor to this ground plane, will
further prevent common mode signals from being con-
verted to differential.
There may be concern on how feedback ratio mismatch
affects distortion. Distortion caused by feedback ratio mis-
match using 1% resistors or better is negligible. However,
in single supply level shifting applications where there is
a voltage difference between the input common mode
voltage and the output common mode voltage, resistor
mismatch can make the apparent voltage offset of the
amplifi er appear higher than specifi ed.
The apparent input referred offset induced by feedback
ratio mismatch is derived from the following equation:
V
OSDIFF(APPARENT)
≈ (V
ICM
– V
OCM
) • Δβ
Using the LTC6404-1 in a single supply application on a
single 5V supply with 1% resistors, and the input common
mode grounded, with the V
OCM
pin biased at mid-supply,
the worst-case DC offset can induce 25mV of apparent
offset voltage. With 0.1% resistors, the worst case appar-
ent offset reduces to 2.5mV.
Input Impedance and Loading Effects
The input impedance looking into the V
INP
or V
INM
input
of Figure 1 depends on whether the sources V
INP
and
V
INM
are fully differential. For balanced input sources
(V
INP
= –V
INM
), the input impedance seen at either input
is simply:
R
INP
= R
INM
= R
I
For single ended inputs, because of the signal imbalance
at the input, the input impedance increases over the bal-
anced differential case. The input impedance looking into
either input is:
RR
R
R
RR
INP INM
I
F
IF
==
+
1
1
2
–•
Input signal sources with non-zero output impedances can
also cause feedback imbalance between the pair of feedback
networks. For the best performance, it is recommended
that the source’s output impedance be compensated for.
If input impedance matching is required by the source,
R1 should be chosen (see Figure 4):
R
RR
RR
INM S
INM S
1
=
Figure 4. Optimal Compensation for Signal Source Impedance
V
S
+
+
R
F
R
F
R
I
R
INM
R
S
R
I
R2 = R
S
|| R1
R1 CHOSEN SO THAT R1 || R
INM
= R
S
R2 CHOSEN TO BALANCE R1 || R
S
R1
6404 F04

LTC6404IUD-1#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
High Speed Operational Amplifiers 600MHz low noise differential ADC driver
Lifecycle:
New from this manufacturer.
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