AOZ1024D
Rev. 1.3 September 2009 www.aosmd.com Page 10 of 16
In a buck converter, output capacitor current is continu-
ous. The RMS current of output capacitor is decided by
the peak to peak inductor ripple current. It can be
calculated by:
Usually, the ripple current rating of the output capacitor is
a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and induc-
tor ripple current is high, output capacitor could be over-
stressed.
Loop Compensation
The AOZ1024D employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output
L&C filter. It greatly simplifies the compensation loop
design.
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system
in frequency domain. The pole is dominant pole can be
calculated by:
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
where;
C
O
is the output filter capacitor,
R
L
is load resistor value, and
ESR
CO
is the equivalent series resistance of output capacitor.
The compensation design is actually to shape the
converter control loop transfer function to get desired
gain and phase. Several different types of compensation
network can be used for the AOZ1024D. For most cases,
a series capacitor and resistor network connected to the
COMP pin sets the pole-zero and is adequate for a stable
high-bandwidth control loop.
In the AOZ1024D, FB pin and COMP pin are the invert-
ing input and the output of internal error amplifier. A
series
R and C compensation network connected to COMP
provides one pole and one zero. The pole is:
where;
G
EA
is the error amplifier transconductance, which is 200 x 10
-6
A/V,
G
VEA
is the error amplifier voltage gain, which is 500 V/V, and
C
2
is compensation capacitor in Figure 1.
The zero given by the external compensation network,
capacitor C
2
and resistor R
3
, is located at:
To design the compensation circuit, a target crossover
frequency f
C
for close loop must be selected. The system
crossover frequency is where control loop has unity gain.
The crossover is the also called the converter bandwidth.
Generally a higher bandwidth means faster response to
load transient. However, the bandwidth should not be too
high because of system stability concern. When design-
ing the compensation loop, converter stability under all
line and load condition must be considered.
Usually, it is recommended to set the bandwidth to be
equal or less than 1/10 of switching frequency. The
AOZ1024D operates at a frequency range from 350kHz
to 600kHz. It is recommended to choose a crossover
frequency equal or less than 40kHz.
The strategy for choosing R
C
and CC is to set the cross
over frequency with R
C
and set the compensator zero
with C
C
. Using selected crossover frequency, f
C
, to
calculate R
3
:
where;
f
C
is the desired crossover frequency. For best performance, f
C
is set to be about 1/10 of the switching frequency;
V
FB
is 0.8V,
G
EA
is the error amplifier transconductance, which is 200 x 10
-6
A/V, and
G
CS
is the current sense circuit transconductance, which is 6.68
A/V.
The compensation capacitor C
C
and resistor R
C
together
make a zero. This zero is put somewhere close to the
I
CO_RMS
ΔI
L
12
----------
=
f
P1
1
2π
C
O
R
L
××
-----------------------------------
=
f
Z1
1
2π C
O
ESR
CO
××
------------------------------------------------
=
f
P2
G
EA
2π C
2
G
VEA
××
------------------------------------------
=
f
Z2
1
2π C
C
R
C
××
-----------------------------------
=
f
C
40kHz=
R
C
f
C
V
O
V
FB
----------
2π C
2
×
G
EA
G
CS
×
----------------------------- -
××=
Not Recommended For New Designs
