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AOZ1024DI

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
AOZ1024D
Rev. 1.3 September 2009 www.aosmd.com Page 7 of 16
Detailed Description
The AOZ1024D is a current-mode step down regulator
with integrated high-side PMOS switch and a low-side
NMOS switch. It operates from a 4.5V to 16V input volt-
age range and supplies up to 4A of load current. The
duty cycle can be adjusted from 6% to 100% allowing a
wide range of output voltage. Features include enable
control, Power-On Reset, input under voltage lockout,
output over voltage protection, active high power good
state, fixed internal soft-start, and thermal shut down.
The AOZ1024D is available in a DFN 5x4 package.
Enable and Soft Start
The AOZ1024D has internal soft start feature to limit
in-rush current and ensure the output voltage ramps up
smoothly to regulation voltage. A soft start process
begins when the input voltage rises to 4.1V and voltage
on the EN pin is HIGH. In the soft start process, the
output voltage is typically ramped to regulation voltage in
4ms. The 4ms soft start time is set internally.
The EN pin of the AOZ1024D is active HIGH. Connect
the EN pin to V
IN
if enable function is not used. Pulling
EN to ground will disable the AOZ1024D. Do not leave it
open. The voltage on EN pin must be above 2V to enable
the AOZ1024D. When voltage on the EN pin falls below
0.6V, the AOZ1024D is disabled. If an application circuit
requires the AOZ1024D to be disabled, an open drain or
open collector circuit should be used to interface to the
EN pin.
Steady-State Operation
Under steady-state conditions, the converter operates in
fixed frequency and Continuous-Conduction Mode
(CCM)
.
The AOZ1024D integrates an internal P-MOSFET as the
high-side switch. Inductor current is sensed by amplifying
the voltage drop across the drain to source of the high
side power MOSFET. Output voltage is divided down by
the external voltage divider at the FB pin. The difference
of the FB pin voltage and reference is amplified by the
internal transconductance error amplifier. The error volt-
age, which shows on the COMP pin, is compared against
the current signal, which is sum of inductor current signal
and ramp compensation signal, at PWM comparator
input. If the current signal is less than the error voltage,
the internal high-side switch is on. The inductor current
flows from the input through the inductor to the output.
When the current signal exceeds the error voltage,
the high-side switch is off. The inductor current is
freewheeling through the internal low-side N-MOSFET
switch to output. The internal adaptive FET driver guar-
antees no turn on overlap of both high-side and low-side
switch.
Compared with regulators using freewheeling Schottky
diodes, the AOZ1024D uses freewheeling NMOSFET to
realize synchronous rectification. It greatly improves the
converter efficiency and reduces power loss in the
low-side switch.
The AOZ1024D uses a P-Channel MOSFET as the
high-side switch. It saves the bootstrap capacitor
normally seen in a circuit which is using an NMOS
switch. It allows 100% turn-on of the high-side switch to
achieve linear regulation mode of operation. The mini-
mum voltage drop from V
IN
to V
O
is the load current x
DC resistance of MOSFET + DC resistance of buck
inductor. It can be calculated by equation below:
where;
V
O_MAX
is the maximum output voltage,
V
IN
is the input voltage from 4.5V to 16V,
I
O
is the output current from 0A to 2A, and
R
DS(ON)
is the on resistance of internal MOSFET, the value is
between 97mΩ and 200mΩ depending on input voltage and
junction temperature.
Switching Frequency
The AOZ1024D switching frequency is fixed and set by
an internal oscillator. The practical switching frequency
could range from 350kHz to 600kHz due to device
variation.
Output Voltage Programming
Output voltage can be set by feeding back the output
to the FB pin by using a resistor divider network (see
Figure 1). The resistor divider network includes R
1
and
R
2
. Usually, a design is started by picking a fixed R
2
value and calculating the required R
1
with equation
below:
Some standard values of R
1
and R
2
for the most
commonly used output voltage values are listed in
Table 1.
V
O_MAX
V
IN
I
O
R
DSON
×–=
V
O
0.8 1
R
1
R
2
-------
+
⎝⎠
⎜⎟
⎛⎞
×=
Not Recommended For New Designs
AOZ1024D
Rev. 1.3 September 2009 www.aosmd.com Page 8 of 16
Table 1.
The combination of R
1
and R
2
should be large enough to
avoid drawing excessive current from the output, which
will cause power loss.
Since the switch duty cycle can be as high as 100%, the
maximum output voltage can be set as high as the input
voltage minus the voltage drop on upper PMOS and
inductor.
Protection Features
The AOZ1024D has multiple protection features to pre-
vent system circuit damage under abnormal conditions.
Over Current Protection (OCP)
The sensed inductor current signal is also used for over
current protection. Since the AOZ1024D employs peak
current mode control, the COMP pin voltage is propor-
tional to the peak inductor current. The COMP pin volt-
age is limited to be between 0.4V and 2.5V internally.
The peak inductor current is automatically limited cycle
by cycle.
When the output is shorted to ground under fault
conditions, the inductor current decays very slowly during
a switching cycle because of V
O
= 0V. To prevent cata-
strophic failure, a secondary current limit is designed
inside the AOZ1024D. The measured inductor current is
compared against a preset voltage which represents the
current limit, between 5.0A and 6.0A. When the output
current is more than current limit, the high side switch will
be turned off. The converter will initiate a soft start once
the over-current condition is resolved.
Power-On Reset (POR)
A power-on reset circuit monitors the input voltage.
When the input voltage exceeds 4.1V, the converter
starts operation. When input voltage falls below 3.7V,
the converter will be shut down.
Thermal Protection
An internal temperature sensor monitors the junction
temperature. It shuts down the internal control circuit and
high side PMOS if the junction temperature exceeds
150°C. The regulator will restart automatically under the
control of soft-start circuit when the junction temperature
decreases to 100ºC.
Application Information
The basic AOZ1024 application circuit is show in
Figure 1. Component selection is explained below.
Input capacitor
The input capacitor must be connected to the V
IN
pin and
PGND pin of AOZ1024D to maintain steady input voltage
and filter out the pulsing input current. The voltage rating
of input capacitor must be greater than maximum input
voltage plus ripple voltage.
The input ripple voltage can be approximated by equa-
tion below:
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
circuit, the RMS value of input capacitor current can be
calculated by:
if we let m equal the conversion ratio:
The relation between the input capacitor RMS current
and voltage conversion ratio is calculated and shown in
Figure 2 on the next page. It can be seen that when V
O
is
half of V
IN
, C
IN
is under the worst current stress. The
worst current stress on C
IN
is 0.5 x I
O
.
V
O
(V) R
1
(kΩ) R
2
(kΩ)
0.8 1.0 Open
1.2 4.99 10
1.5 10 11.5
1.8 12.7 10.2
2.5 21.5 10
3.3 31.6 10
5.0 52.3 10
ΔV
IN
I
O
fC
IN
×
-----------------
1
V
O
V
IN
---------
–
⎝⎠
⎜⎟
⎛⎞
V
O
V
IN
---------
××=
I
CIN_RMS
I
O
V
O
V
IN
---------
1
V
O
V
IN
---------
–
⎝⎠
⎜⎟
⎛⎞
×=
V
O
V
IN
---------
m=
Not Recommended For New Designs
AOZ1024D
Rev. 1.3 September 2009 www.aosmd.com Page 9 of 16
Figure 2. I
CIN
vs. Voltage Conversion Ratio
For reliable operation and best performance, the input
capacitors must have current rating higher than I
CIN_RMS
at worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low ESR
and high current rating. Depending on the application
circuits, other low ESR tantalum capacitor may also be
used. When selecting ceramic capacitors, X5R or X7R
type dielectric ceramic capacitors should be used for
their better temperature and voltage characteristics. Note
that the ripple current rating from capacitor manufactures
are based on certain amount of life time. Further
de-rating may be necessary in practical design.
Inductor
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is:
The peak inductor current is:
High inductance gives low inductor ripple current but
requires a larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 20–30%
of output current.
When selecting the inductor, make sure it is able to
handle the peak current without saturation even at the
highest operating temperature.
The inductor takes the highest current in a buck circuit.
The conduction loss on inductor need to be checked for
thermal and efficiency requirements.
Surface mount inductors in different shape and styles are
available from Coilcraft, Elytone and Murata. Shielded
inductors are small and radiate less EMI noise, but they
cost more than unshielded inductors. The choice
depends on EMI requirement, price, and size.
Output Capacitor
The output capacitor is selected based on the DC output
voltage rating, output ripple voltage specification and
ripple current rating.
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be consid-
ered for long term reliability.
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck
converter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:
where,
C
O
is output capacitor value, and
ESR
CO
is the equivalent series resistance of the output
capacitor.
When a low ESR ceramic capacitor is used as the output
capacitor, the impedance of the capacitor at the switching
frequency dominates. Output ripple is mainly caused by
capacitor value and inductor ripple current. The output
ripple voltage calculation can be simplified to:
If the impedance of ESR at switching frequency
dominates, the output ripple voltage is mainly decided
by capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:
For lower output ripple voltage across the entire operat-
ing temperature range, X5R or X7R dielectric type of
ceramic, or other low ESR tantalum capacitors are
recommended to be used as output capacitors.
0
0.1
0.2
0.3
0.4
0.5
0 0.5 1
m
I
CIN_RMS
(m)
I
O
ΔI
L
V
O
fL×
-----------
1
V
O
V
IN
---------
–
⎝⎠
⎜⎟
⎛⎞
×=
I
Lpeak
I
O
ΔI
L
2
--------
+=
ΔV
O
ΔI
L
ESR
CO
1
8 fC
O
××
-------------------------
+
⎝⎠
⎛⎞
×=
ΔV
O
ΔI
L
1
8 fC
O
××
-------------------------
×=
ΔV
O
ΔI
L
ESR
CO
×=
Not Recommended For New Designs
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

AOZ1024DI

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