Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 1
Rev. A
05/11/09
IS62WV10248DALL/BLL
IS65WV10248DALL/BLL
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on
any published information and before placing orders for products.
1M x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
• High-speedaccesstime:45ns,55ns
• CMOSlowpoweroperation
– 30 mW (typical) operating
–12µW(typical)CMOSstandby
• TTLcompatibleinterfacelevels
• Singlepowersupply
–1.65V--2.2VV
d d (62/65WV10248dALL)
–2.4V--3.6VV
d d (62/65WV10248dBLL)
• Fullystaticoperation:noclockorrefresh
required
• Threestateoutputs
• Datacontrolforupperandlowerbytes
• Automotivetemperature(-40
o
C to +125
o
C)
• Lead-freeavailable
DESCRIPTION
The ISSI IS62WV10248DALL/ IS62WV10248DBLL are
high-speed,8MbitstaticRAMsorganizedas1Mwords
by8bits.ItisfabricatedusingISSI'shigh-performance
CMOStechnology.This highlyreliableprocesscoupled
with innovative circuit design techniques, yields high-
performance and low power consumption devices.
When CS1 isHIGH (deselected)orwhenCS2isLOW
(deselected), the device assumes a standby mode at
which the power dissipation can be reduced down with
CMOSinputlevels.
Easy memory expansion is provided by using Chip Enable
andOutputEnableinputs.TheactiveLOWWriteEnable
(WE) controls both writing and reading of the memory.
The IS62WV10248DALL and IS62WV10248DBLL are
packagedintheJEDECstandard48-pinminiBGA(9mm
x 11mm) and 44-PinTSOP(TYPEII).
FUNCTIONAL BLOCK DIAGRAM
MAY 2009
A0-A19
CS1
OE
WE
1M x 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VDD
I/O
DATA
CIRCUIT
I/O0-I/O7
CS2