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NTHD4P02FT1G

P1-P3P4-P6P7-P7
NTHD4P02F
http://onsemi.com
4
TYPICAL MOSFET PERFORMANCE CURVES (T
J
= 25°C unless otherwise noted)
0
1
2
3
4
5
01234
3
6
9
12
15
0
V
DS
= 0 V V
GS
= 0 V
510 10
600
300
200
100
0
20
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
C, CAPACITANCE (pF)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
T
J
= 25°C
C
OSS
C
ISS
C
RSS
500
R
G
, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
t, TIME (ns)
50
400
−V
GS
−V
DS
15
0.9
0.5
0
−V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
−I
S
, SOURCE CURRENT (AMPS)
V
GS
= 0 V
T
J
= 25°C
2.5
0.70.50.3
1
1.5
2
0
1
2
3
4
5
−V
GS
Q
G
, TOTAL GATE CHARGE (nC)
−V
GS,
GATE−TO−SOURCE VOLTAGE (V)
I
D
= −2.1 A
T
J
= 25°C
−V
DS,
DRAIN−TO−SOURCE VOLTAGE (V)
Q
GD
Q
GS
−V
DS
Q
T
1
10
100
1000
1 10 100
t
d(OFF)
t
d(ON)
t
f
t
r
V
DD
= −16 V
I
D
= −2.1 A
V
GS
= −4.5 V
t, TIME (s)
Figure 11. Thermal Response
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1.0
0.1
0.01
0.2
D = 0.5
0.05
0.01
SINGLE PULSE
0.1
1.0E−03 1.0E−02 1.0E−01 1.0E+00 1.0E+01 1.0E+02 1.0E+03
0.02
0.0175 W 0.0710 W 0.2706 W 0.5776 W 0.7086 W
107.55 F1.7891 F0.3074 F0.0854 F0.0154 F
Chip
Ambient
Normalized to qja at 10s.
NTHD4P02F
http://onsemi.com
5
TYPICAL SCHOTTKY PERFORMANCE CURVES (T
J
= 25°C unless otherwise noted)
10
0.20
V
F
, INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
I
F
, INSTANTANEOUS FORWARD
CURRENT (AMPS)
1
0.1
Figure 12. Typical Forward Voltage Figure 13. Maximum Forward Voltage
10
1E−6
100E−9
10E−9
Figure 14. Typical Reverse Current
V
R
, REVERSE VOLTAGE (VOLTS)
I
R,
REVERSE CURRENT (AMPS)
Figure 15. Maximum Reverse Current
25
3
2
2.5
1
0
65 125105
Figure 16. Current Derating
T
L
, LEAD TEMPERATURE (°C)
T
J
= 150°C
1E−3
T
J
= 25°C
85 165
freq = 20 kHz
I
O,
AVERAGE FORWARD CURRENT (AMPS)
3.5
20
01
0
3.
5
3
Figure 17. Forward Power Dissipation
I
O
, AVERAGE FORWARD CURRENT (AMPS)
2
P
FO
, AVERAGE POWER DISSIPATION (WATTS)
0.2
1.8
0.40
0.5 1.5 2.5
0.60 0.80
0
T
J
= 25°C
T
J
= −55°C
10
0.20
V
F
, MAXIMUM INSTANTANEOUS FORWARD
VOLTAGE (VOLTS)
I
F
, INSTANTANEOUS FORWARD
CURRENT (AMPS)
1
0.1
T
J
= 150°C
0.40 0.60 0.80
T
J
= 25°C
10E−6
T
J
= 100°C
T
J
= 150°C
10
V
R
, REVERSE VOLTAGE (VOLTS)
2
0
0
I
R,
MAXIMUM REVERSE CURRENT (AMPS)
1.5
0.5
45 145
Ipk/Io = 20
Ipk/Io = 10
Ipk/Io = 5
Ipk/Io = p
square wave
dc
1
1.6
0.4
0.6
0.8
Ipk/Io = 20
Ipk/Io = 10
Ipk/Io = 5
Ipk/Io = p
square wave dc
1.4
1.2
100E−6
1.0E−4
1.0E−6
1.0E−7
1.0E+1
T
J
= 25°C
1.0E−3
T
J
= 100°C
T
J
= 150°C
1.0E+0
1.0E−5
1.0E−2
1.0E−1
NTHD4P02F
http://onsemi.com
6
Figure 18. Basic
Figure 19. Style 3
0.457
0.018
2.032
0.08
0.66
0.026
0.254
0.010
ǒ
mm
inches
Ǔ
SCALE 20:1
1.092
0.043
0.178
0.007
0.711
0.028
0.457
0.018
2.032
0.08
0.635
0.025
0.66
0.026
0.711
0.028
ǒ
mm
inches
Ǔ
SCALE 20:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
BASIC PAD PATTERNS
The basic pad layout with dimensions is shown in
Figure 18. This is sufficient for low power dissipation
MOSFET applications, but power semiconductor
performance requires a greater copper pad area,
particularly for the drain leads.
The minimum recommended pad pattern shown in
Figure 19 improves the thermal area of the drain
connections (pins 5, 6) while remaining within the confines
of the basic footprint. The drain copper area is 0.0019 sq.
in. (or 1.22 sq. mm). This will assist the power dissipation
path away from the device (through the copper lead−frame)
and into the board and exterior chassis (if applicable) for
the single device. The addition of a further copper area
and/or the addition of vias to other board layers will
enhance the performance still further.
P1-P3P4-P6P7-P7

NTHD4P02FT1G

Mfr. #:
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Manufacturer:
ON Semiconductor
Description:
MOSFET -20V -3A P-Channel w/3A Schottky
Lifecycle:
New from this manufacturer.
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