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74LCX00YTTR
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P16
Pack
age mechanical
data
74LCX00
10/16
Doc ID 4972 Rev
7
7 P
a
c
kage
mechanical
data
In order t
o meet environmenta
l
req
uirements, ST of
fers these de
vices in diff
erent gr
ade
s of
ECO
P
ACK
®
packages, depending on their le
v
e
l
of environmental complian
ce.
ECOP
ACK
specifications, grade definitions and prod
uct status a
r
e
av
ailable at:
www
.st.com
.
ECOP
ACK
is an ST t
rademar
k.
74LCX
00
Packag
e mecha
nical data
Doc ID 4972 Rev
7
11/16
Figure 6.
SO-14 packa
ge o
utline
T
able 10.
SO-14 package mechanical
d
ata
Symbol
Dimensi
ons
mm inch
Min. T
y
p.
Max.
Min.
T
yp.
Max
.
A 1.35
1.75
0.053
0.0
69
A1
0.1
0.25
0.004
0.010
A2 1.10
1.65
0.043
0.065
B 0.33
0.51
0.013
0.0
20
C 0.19
0.25
0.007
0.010
D 8.55
8.75
0.337
0.344
E 3.8
4.0
0.1
50 0.
1
57
e
1.27
0.050
H 5.8
6.2
0.2
28
0.2
44
h 0.25
0.50
0.010
0.020
L 0.4
1.
27
0.016
0.050
k 0°
8°
0°
8°
ddd 0.
100
0.
004
Pack
age mechanical
data
74LCX00
12/16
Doc ID 4972 Rev
7
Figure 7
.
TS
SOP14
package o
utline
T
able 11.
TSSOP14
package mech
anical d
ata
Sy
m
bo
l
Dimensions
mm i
nch
Min. T
yp.
Max.
Min.
T
yp
. Ma
x.
A 1.2
0.04
7
A1 0.05
0.15
0.002
0.004
0.00
6
A2 0.8
1
1
.05
0.0
31
0.03
9
0.04
1
b 0.19
0.30
0.007
0
.012
c 0.09
0.20
0.004
0.0089
D
4.9 5 5.1
0.193
0.19
7
0.20
1
E 6.2
6.4
6.
6
0.244
0.25
2
0.26
0
E1 4.3
4.4
4
.48
0.1
69
0.17
3
0.17
6
e 0.65
BSC
0.
02
56
BSC
K 0°
8°
0°
8°
L 0.45
0.60
0.75
0.
0
18
0.02
4
0
.030
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P16
74LCX00YTTR
Mfr. #:
Buy 74LCX00YTTR
Manufacturer:
STMicroelectronics
Description:
Logic Gates Lo Vltg CMOS QUAD 2-Input NAND gate
Lifecycle:
New from this manufacturer.
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