ADA4412-3
Rev. 0 | Page 3 of 16
SPECIFICATIONS
V
S
= 5 V, @ T
A
= 25°C, V
O
= 1.4 V p-p, R
L
= 150 Ω, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
OVERALL PERFORMANCE
Offset Error Input referred, all channels 9 23 mV
Offset Adjust Range Input referred ±500 mV
Input Voltage Range, All Inputs V
S−
− 0.1 V
S+
− 2.0 V
Output Voltage Swing, All Outputs Positive swing V
S+
− 0.30 V
S+
− 0.20 V
Negative swing V
S−
+ 0.10 V
S−
+ 0.15 V
Linear Output Current per Channel 30 mA
Integrated Voltage Noise, Referred to Input All channels 0.50 mV rms
Filter Input Bias Current All channels 6.6 μA
Total Harmonic Distortion at 1 MHz F
C
= 36 MHz, F
C
= 18 MHz/F
C
= 9 MHz 0.01/0.04 %
Gain Error Magnitude 0.09 0.49 dB
FILTER DYNAMIC PERFORMANCE
−1 dB Bandwidth Cutoff frequency select = 36 MHz 26.5 31.5 MHz
Cutoff frequency select = 18 MHz 13.5 15.5 MHz
Cutoff frequency select = 9 MHz 6.5 8.0 MHz
−3 dB Bandwidth Cutoff frequency select = 36 MHz 34 37 MHz
Cutoff frequency select = 18 MHz 16 19 MHz
Cutoff frequency select = 9 MHz 8 9 MHz
Out-of-Band Rejection f = 75 MHz −31 −43 dB
Crosstalk f = 5 MHz, F
C
= 36 MHz −62 dB
Propagation Delay f = 5 MHz, F
C
= 36 MHz 19 ns
Group Delay Variation Cutoff frequency select = 36 MHz 7 ns
Cutoff frequency select = 18 MHz 14 ns
Cutoff frequency select = 9 MHz 27 ns
Differential Gain NTSC, F
C
= 9 MHz 0.16 %
Differential Phase NTSC, F
C
= 9 MHz 0.05 Degrees
CUTOFF CONTROL INPUT PERFORMANCE
Input Logic 0 Voltage 0.8 V
Input Logic 1 Voltage 2.0 V
Input Bias Current 10 15 μA
DISABLE PERFORMANCE
DISABLE Assert Voltage V
S+
− 0.5 V
DISABLE Assert Time 100 ns
DISABLE Deassert Time 130 ns
DISABLE Input Bias Current 12 μA
Input-to-Output Isolation—Disabled f = 10 MHz 90 dB
POWER SUPPLY
Operating Range 4.5 12 V
Quiescent Current 53 56 mA
Quiescent Current—Disabled 10 150 μA
PSRR, Positive Supply All channels 64 70 dB
PSRR, Negative Supply All channels 58 60 dB
ADA4412-3
Rev. 0 | Page 4 of 16
V
S
= ±5 V, @ T
A
= 25°C, V
O
= 1.4 V p-p, R
L
= 150 Ω, unless otherwise noted.
Table 2.
Parameter Test Conditions/Comments Min Typ Max Unit
OVERALL PERFORMANCE
Offset Error Input referred, all channels 10 25 mV
Offset Adjust Range Input referred ±500 mV
Input Voltage Range, All Inputs V
S−
− 0.1 V
S+
− 2.0 V
Output Voltage Swing, All Outputs Positive swing V
S+
− 0.33 V
S+
− 0.24 V
Negative swing V
S−
+ 0.24 V
S−
+ 0.33 V
Linear Output Current per Channel 30 mA
Integrated Voltage Noise, Referred to Input All channels 0.50 mV rms
Filter Input Bias Current All channels 6.3 μA
Total Harmonic Distortion at 1 MHz F
C
= 36 MHz, F
C
= 18 MHz/F
C
= 9 MHz 0.01/0.03 %
Gain Error Magnitude 0.04 0.50 dB
FILTER DYNAMIC PERFORMANCE
−1 dB Bandwidth Cutoff frequency select = 36 MHz 30.0 MHz
Cutoff frequency select = 18 MHz 15.5 MHz
Cutoff frequency select = 9 MHz 8.0 MHz
−3 dB Bandwidth Cutoff frequency select = 36 MHz 34 36 MHz
Cutoff frequency select = 18 MHz 17 19 MHz
Cutoff frequency select = 9 MHz 8 9 MHz
Out-of-Band Rejection f = 75 MHz −31 −42 dB
Crosstalk f = 5 MHz, F
C
= 36 MHz −62 dB
Propagation Delay f = 5 MHz, F
C
= 36 MHz 19 ns
Group Delay Variation Cutoff frequency select = 36 MHz 7 ns
Cutoff frequency select = 18 MHz 12 ns
Cutoff frequency select = 9 MHz 24 ns
Differential Gain NTSC, F
C
= 9 MHz 0.04 %
Differential Phase NTSC, F
C
= 9 MHz 0.16 Degrees
CUTOFF CONTROL INPUT PERFORMANCE
Input Logic 0 Voltage 0.8 V
Input Logic 1 Voltage 2.0 V
Input Bias Current 10 15 μA
DISABLE PERFORMANCE
DISABLE Assert Voltage V
S+
− 0.5 V
DISABLE Assert Time 75 ns
DISABLE Deassert Time 125 ns
DISABLE Input Bias Current 35 μA
Input-to-Output Isolation—Disabled f = 10 MHz 90 dB
POWER SUPPLY
Operating Range 4.5 12 V
Quiescent Current 57 60 mA
Quiescent Current—Disabled 10 150 μA
PSRR, Positive Supply All channels 66 74 dB
PSRR, Negative Supply All channels 59 62 dB
ADA4412-3
Rev. 0 | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 12 V
Power Dissipation See Figure 2
Storage Temperature –65°C to +125°C
Operating Temperature Range –40°C to +85°C
Lead Temperature Range (Soldering 10 sec) 300°C
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, θ
JA
is
specified for device soldered in circuit board for surface-mount
packages.
Table 4. Thermal Resistance
Package Type θ
JA
Unit
20-Lead QSOP 83 °C/W
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4412-3
package is limited by the associated rise in junction temperature
(T
J
) on the die. At approximately 150°C, which is the glass
transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit may change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the ADA4412-3.
Exceeding a junction temperature of 150°C for an extended
period can result in changes in the silicon devices potentially
causing failure.
The power dissipated in the package (P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
S
) times the
quiescent current (I
S
). The power dissipated due to load drive
depends on the particular application. For each output, the
power due to load drive is calculated by multiplying the load
current by the associated voltage drop across the device. The
power dissipated due to all of the loads is equal to the sum of
the power dissipations due to each individual load. RMS
voltages and currents must be used in these calculations.
Airflow increases heat dissipation, effectively reducing θ
JA
.
In addition, more metal directly in contact with the package
leads from metal traces, through-holes, ground, and power
planes reduces the θ
JA
.
Figure 2 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 20-lead QSOP
(83°C/W) on a JEDEC standard 4-layer board. θ
JA
values are
approximations.
05528-002
AMBIENT TEMPERATURE (°C)
WATTS
–40 –20 0 20 40 60
0.5
0.7
0.9
1.1
1.3
1.5
1.7
1.9
2.1
2.3
2.5
80
Figure 2. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

ADA4412-3ARQZ-RL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Video ICs Intg Triple Video Filter
Lifecycle:
New from this manufacturer.
Delivery:
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