8-OUTPUT 1.8V PCIE GEN1-3 ZERO-DELAY/FAN-OUT BUFFER W/ZO=100OHMS 10 APRIL 28, 2016
9DBV0841 DATASHEET
SMBus Table: Output Enable Register
1
Byte 0 Name Control Function Type 0 1 Default
Bit 7
DIF OE7 Output Enable RW Low/Low OE7# control 1
Bit 6
DIF OE6 Output Enable RW Low/Low OE6# control 1
Bit 5
DIF OE5 Output Enable RW Low/Low OE5# control 1
Bit 4
DIF OE4 Output Enable RW Low/Low OE4# control 1
Bit 3
DIF OE3 Output Enable RW Low/Low OE3# control 1
Bit 2
DIF OE2 Output Enable RW Low/Low OE2# control 1
Bit 1
DIF OE1 Output Enable RW Low/Low OE1# control 1
Bit 0
DIF OE0 Output Enable RW Low/Low OE0# control 1
1. A low on these bits will overide the OE# pin and force the differential output Low/Low
SMBus Table: PLL Operating Mode and Output Amplitude Control Register
Byte 1 Name Control Function Type 0 1 Default
Bit 7
PLLMODERB1 PLL Mode Readback Bit 1
R
Latch
Bit 6
PLLMODERB0 PLL Mode Readback Bit 0
R
Latch
Bit 5
PLLMODE_SWCNTRL Enable SW control of PLL Mode RW
Values in B1[7:6]
set PLL Mode
Values in B1[4:3]
set PLL Mode
0
Bit 4
PLLMODE1 PLL Mode Control Bit 1
RW
1
0
Bit 3
PLLMODE0 PLL Mode Control Bit 0
RW
1
0
Bit 2
1
Bit 1
AMPLITUDE 1 RW 00 = 0.6V 01 = 0.7V 1
Bit 0
AMPLITUDE 0 RW 10= 0.8V 11 = 0.9V 0
1. B1[5] must be set to a 1 for these bits to have any effect on the part.
SMBus Table: DIF Slew Rate Control Register
Byte 2 Name Control Function Type 0 1 Default
Bit 7
SLEWRATESEL DIF7 Adjust Slew Rate of DIF7 RW Slow setting Fast setting 1
Bit 6
SLEWRATESEL DIF6 Adjust Slew Rate of DIF6 RW Slow setting Fast setting 1
Bit 5
SLEWRATESEL DIF5 Adjust Slew Rate of DIF5 RW Slow setting Fast setting 1
Bit 4
SLEWRATESEL DIF4 Adjust Slew Rate of DIF4 RW Slow setting Fast setting 1
Bit 3
SLEWRATESEL DIF3 Adjust Slew Rate of DIF3 RW Slow setting Fast setting 1
Bit 2
SLEWRATESEL DIF2 Adjust Slew Rate of DIF2 RW Slow setting Fast setting 1
Bit 1
SLEWRATESEL DIF1 Adjust Slew Rate of DIF1 RW Slow setting Fast setting 1
Bit 0
SLEWRATESEL DIF0 Adjust Slew Rate of DIF0 RW Slow setting Fast setting 1
SMBus Table: Frequency Select Control Register
Byte 3 Name Control Function Type 0 1 Default
Bit 7
1
Bit 6
1
Bit 5
FREQ_SEL_EN
Enable SW selection of
frequency
RW
SW frequency
change disabled
SW frequency
change enabled
0
Bit 4
FSEL1 Freq. Select Bit 1
RW
1
0
Bit 3
FSEL0 Freq. Select Bit 0
RW
1
0
Bit 2
1
Bit 1
1
Bit 0
SLEWRATESEL FB Adjust Slew Rate of FB RW Slow setting Fast setting 1
1. B3[5] must be set to a 1 for these bits to have any effect on the part.
Byte 4 is Reserved and reads back 'hFF
Reserved
Reserved
See Frequency Select Table
See PLL Operating Mode Table
See PLL Operating Mode Table
Reserved
Controls Output Amplitude
Reserved
Reserved
APRIL 28, 2016 11 8-OUTPUT 1.8V PCIE GEN1-3 ZERO-DELAY/FAN-OUT BUFFER W/ZO=100OHMS
9DBV0841 DATASHEET
SMBus Table: Revision and Vendor ID Register
Byte 5 Name Control Function Type 0 1 Default
Bit 7
RID3
R
0
Bit 6
RID2
R
0
Bit 5
RID1
R
0
Bit 4
RID0
R
0
Bit 3
VID3
R
0
Bit 2
VID2
R
0
Bit 1
VID1
R
0
Bit 0
VID0
R
1
SMBus Table: Device Type/Device ID
Byte 6 Name Control Function Type 0 1 Default
Bit 7
Device Type1
R
0
Bit 6
Device Type0
R
1
Bit 5
Device ID5
R
0
Bit 4
Device ID4
R
0
Bit 3
Device ID3
R
1
Bit 2
Device ID2
R
0
Bit 1
Device ID1
R
0
Bit 0
Device ID0
R
0
SMBus Table: Byte Count Register
Byte 7 Name Control Function Type 0 1 Default
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
BC4 RW 0
Bit 3
BC3 RW 1
Bit 2
BC2 RW 0
Bit 1
BC1 RW 0
Bit 0
BC0 RW 0
0001 = IDT
Reserved
Reserved
Device Type
Writing to this register will configure how
many bytes will be read back, default is
= 8 bytes.
Byte Count Programming
VENDOR ID
Device ID
Reserved
Revision ID
001000 binary or 08 hex
00 = FGx, 01 = DBx,
10 = DMx, 11= Reserved
A rev = 0000
8-OUTPUT 1.8V PCIE GEN1-3 ZERO-DELAY/FAN-OUT BUFFER W/ZO=100OHMS 12 APRIL 28, 2016
9DBV0841 DATASHEET
Marking Diagrams
Notes:
1. “LOT” is the lot sequence number.
2. “COO” denotes country of origin.
3. YYWW is the last two digits of the year and week that the part was assembled.
4. Line 2: truncated part number
5. “L” denotes RoHS compliant package.
6. “I” denotes industrial temperature range device.
Thermal Characteristics
ICS
DBV0841AL
YYWW
COO
LOT
ICS
BV0841AIL
YYWW
COO
LOT
PARAMETER SYMBOL CONDITIONS PKG
TYP
VALUE
UNITS NOTES
θ
JC
Junction to Case 33 °
C/W
1
θ
Jb
Junction to Base 2.1 °
C/W
1
θ
JA0
θ
Junction to Air, still air 37 °
C/W
1
θ
JA1
Junction to Air, 1 m/s air flow 30 °
C/W
1
θ
JA3
Junction to Air, 3 m/s air flow 27 °
C/W
1
θ
JA5
Junction to Air, 5 m/s air flow 26 °
C/W
1
1
ePad soldered to board
Thermal Resistance NDG48

9DBV0841AKLFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Buffer VERY LOW POWER PCIE GEN1-2-3 BUFFER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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