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NCV8843DG

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
NCV8843
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7
Figure 4. Oscillator Frequency Versus Junction
Temperature
0−20 20 100
T
J
, JUNCTION TEMPERATURE (°C)
f
OSC
, FREQUENCY (%)
90
92.5
95
97.5
100
102.5
−40 40 60 80 140120
An external clock signal can sync the NCV8843 to a
higher frequency. The SYNC pin equivalent input circuit is
shown in Figure 5.
Figure 5.
Sync
GND
50k
±33%
V
Z
= 11V
to 20V
10k
±33%
50k
±33%
The rising edge of the sync pulse turns on the power
switch to start a new switching cycle, as shown in Figure 6.
There is approximately 0.5 ms delay between the rising edge
of the sync pulse and rising edge of the V
SW
pin voltage. The
sync threshold is TTL logic compatible, and duty cycle of
the sync pulses can vary from 10% to 90%. The frequency
foldback feature is disabled during the sync mode.
Figure 6. A NCV8843 Buck Regulator is
Synchronized to an External 443 kHz Pulse Signal
Power Switch and Current Limit
The collector of the built−in NPN power switch is
connected to the V
IN
pin, and the emitter to the V
SW
pin.
When the switch turns on, the V
SW
voltage is equal to the
V
IN
minus switch Saturation Voltage. In the buck regulator,
the V
SW
voltage swings to one diode drop below ground
when the power switch turns off, and the inductor current is
commutated to the catch diode. Due to the presence of high
pulsed current, the traces connecting the V
SW
pin, inductor
and diode should be kept as short as possible to minimize the
noise and radiation. For the same reason, the input capacitor
should be placed close to the V
IN
pin and the anode of the
diode.
The saturation voltage of the power switch is dependent
on the switching current, as shown in Figure 7.
Figure 7. Power Switch Saturation Versus Switching
Current (Normalized to 1.5 A)
0 0.5 1.0 1.5
SWITCHING CURRENT (A)
(V
IN
− V
SW
) / (V
IN
− V
SW
) @ 1.5 A
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
2.0
The NCV8843 contains pulse−by−pulse current limiting
to protect the power switch and external components. When
the peak of the switching current reaches the Current Limit,
the power switch turns off after the Current Limit Delay. The
switch will not turn on until the next switching cycle. The
current limit threshold is independent of switching duty
cycle. The maximum load current, given by the following
formula under continuous conduction mode, is less than the
Current Limit due to the ripple current.
I
O(MAX)
+ I
LIM
*
V
O
(V
IN
* V
O
)
2(L)(V
IN
)(f
s
)
where:
f
S
= switching frequency,
I
LIM
= current limit threshold,
V
O
= output voltage,
V
IN
= input voltage,
L = inductor value.
When the regulator runs under current limit, the
subharmonic oscillation may cause low frequency
oscillation, as shown in Figure 8. Similar to current mode
control, this oscillation occurs at the duty cycle greater than
50% and can be alleviated by using a larger inductor value.
The current limit threshold is reduced to Foldback Current
when the FB pin falls below Foldback Threshold. This
feature protects the IC and external components under the
power up or over−load conditions.
NCV8843
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8
Figure 8. The Regulator in Current Limit
BOOST Pin
The BOOST pin provides base driving current for the
power switch. A voltage higher than V
IN
provides required
headroom to turn on the power switch. This in turn reduces
IC power dissipation and improves overall system
efficiency. The BOOST pin can be connected to an external
boost−strapping circuit which typically uses a 0.1 mF capacitor
and a 1N914 or 1N4148 diode, as shown in Figure 1.
When the power switch is turned on, the voltage on the
BOOST pin is equal to
V
BOOST
+ V
IN
) V
O
* V
F
where:
V
F
= diode forward voltage.
The anode of the diode can be connected to any DC
voltage as well as the regulated output voltage (Figure 1).
However, the maximum voltage on the BOOST pin should
not exceed 40 V.
As shown in Figure 9, the BOOST pin current includes a
constant 7.0 mA pre−driver current and base current
proportional to switch conducting current. A detailed
discussion of this current is conducted in Thermal
Consideration section. A 0.1 mF capacitor is usually
adequate for maintaining the Boost pin voltage during the on
time.
Figure 9. The Boost Pin Current Includes 7.0 mA
Pre−Driver Current and Base Current when the
Switch is Turned On. The Beta Decline of the
Power Switch Further Increases the Base
Current at High Switching Current
0 0.5 1.0 1.5
SWITCHING CURRENT (A)
BOOST PIN CURRENT (mA)
0
5
10
15
20
25
30
Shutdown
The internal power switch will not turn on until the V
IN
pin rises above the Startup Voltage. This ensures no
switching will occur until adequate supply voltage is
provided to the IC. Refer to Figure 10 for the SHDNB
(shutdown−bar) pin input circuit.
Figure 10.
+
-
SHDNB
V
IN
GND
1.2V
20k
±33%
V
Z
= 6V to 8V
1 mA to 10 mA
The IC enters a sleep mode when the SHDNB pin is pulled
below the Shutdown Threshold Voltage. In sleep mode, the
power switch is kept open and the supply current reduces to
Shutdown Quiescent Current (1 mA typically). This pin has
an internal pull−down current. When not in use, pull this pin
up to V
CC
with a resistor (See Figure 1). A 100 kW pullup
resistor will ensure safe operation from below 9 V and
during a 40 V load dump condition.
NCV8843
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9
Startup
During power up, the regulator tends to quickly charge up
the output capacitors to reach voltage regulation. This gives
rise to an excessive in−rush current which can be detrimental
to the inductor, IC and catch diode. In V
2
control , the
compensation capacitor provides Soft−Start with no need
for extra pin or circuitry. During the power up, the Output
Source Current of the error amplifier charges the
compensation capacitor which forces V
C
pin and thus output
voltage ramp up gradually. The Soft−Start duration can be
calculated by
T
SS
+
V
C
C
COMP
I
SOURCE
where:
V
C
= V
C
pin steady−state voltage, which is approximately
equal to error amplifier’s reference voltage.
C
COMP
= Compensation capacitor connected to the V
C
pin
I
SOURCE
= Output Source Current of the error amplifier.
Using a 0.1 mF C
COMP
, the calculation shows a T
SS
over
5.0 ms which is adequate to avoid any current stresses.
Figure 11 shows the gradual rise of the V
C
, V
O
and envelope
of the V
SW
during power up. There is no voltage over−shoot
after the output voltage reaches the regulation. If the supply
voltage rises slower than the V
C
pin, output voltage may
over−shoot.
Figure 11. The Power Up Transition of NCV8843
Regulator
Short Circuit
When the V
FB
pin voltage drops below Foldback
Threshold, the regulator reduces the peak current limit by
40% and switching frequency to 1/4 of the nominal
frequency. These features are designed to protect the IC and
external components during over load or short circuit
conditions. In those conditions, peak switching current is
clamped to the current limit threshold. The reduced
switching frequency significantly increases the ripple
current, and thus lowers the DC current. The short circuit can
cause the minimum duty cycle to be limited by Minimum
Output Pulse Width. The foldback frequency reduces the
minimum duty cycle by extending the switching cycle. This
protects the IC from overheating, and also limits the power
that can be transferred to the output. The current limit
foldback effectively reduces the current stress on the
inductor and diode. When the output is shorted, the DC
current of the inductor and diode can approach the current
limit threshold. Therefore, reducing the current limit by 40%
can result in an equal percentage drop of the inductor and
diode current. The short circuit waveforms are captured in
Figure 12, and the benefit of the foldback frequency and
current limit is self−evident.
Figure 12. In Short Circuit, the Foldback Current and
Foldback Frequency Limit the Switching Current to
Protect the IC, Inductor and Catch Diode
Thermal Considerations
A calculation of the power dissipation of the IC is always
necessary prior to the adoption of the regulator. The current
drawn by the IC includes quiescent current, pre−driver
current, and power switch base current. The quiescent
current drives the low power circuits in the IC, which
include comparators, error amplifier and other logic blocks.
Therefore, this current is independent of the switching
current and generates power equal to
W
Q
+ V
IN
I
Q
where:
I
Q
= quiescent current.
The pre−driver current is used to turn on/off the power
switch and is approximately equal to 12 mA in worst case.
During steady state operation, the IC draws this current from
the Boost pin when the power switch is on and then receives
it from the V
IN
pin when the switch is off. The pre−driver
current always returns to the V
SW
pin. Since the pre−driver
current goes out to the regulator’s output even when the
power switch is turned off, a minimum load is required to
prevent overvoltage in light load conditions. If the Boost pin
voltage is equal to V
IN
+ V
O
when the switch is on, the power
dissipation due to pre−driver current can be calculated by
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

NCV8843DG

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Manufacturer:
ON Semiconductor
Description:
Switching Voltage Regulators 340 KHZ REGULATOR
Lifecycle:
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