STM6510WCACDG6F Datasheet STM6510WCACDG6F, STM6510SCACDG6F, STM6510RCACDG6F | P4-P6

List of figures STM6510

4/26 Doc ID 16788 Rev 2

List of figures

Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 2. Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4. Single-button Smart Reset™ typical hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 5. Dual-button Smart Reset™ typical hookup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 6. Timing waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 7. Supply current (I

) vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 8. Smart Reset™ delay (t

SRC

) vs. temperature, C

SRC

= 0.56 µF . . . . . . . . . . . . . . . . . . . . . . 11

Figure 9. Reset timeout period (t

REC

) vs. temperature, C

tREC

= 0.01 µF . . . . . . . . . . . . . . . . . . . . . 12

Figure 10. Reset threshold (V

RST

) vs. temperature, “S” threshold option, V

falling. . . . . . . . . . . . . 12

Figure 11. AC testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 12. TDFN – 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package outline . . . . . . . . . . . . . . . . . . . . . 18

Figure 13. Landing pattern - TDFN – 8-lead 2 x 2 mm without thermal pad . . . . . . . . . . . . . . . . . . . . 19

Figure 14. Carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 15. Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 16. Tape trailer/leader. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 17. Pin 1 orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 18. Package marking, top view. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

STM6510 Description

Doc ID 16788 Rev 2 5/26

1 Description

1.1 Smart Reset™ devices

The Smart Reset™ device family STM65xx provides a useful feature that ensures

inadvertent short reset push-button closures do not cause system resets. This is done by

implementing an extended Smart Reset™ input delay (t

SRC

). Once the valid Smart Reset™

input levels and setup delay are met, the device generates an output reset pulse with user-

programmable timeout period (t

REC

The typical application hookup shows that the dual Smart Reset™ inputs can be also

connected to the applications interrupt to allow the control of both the interrupt pin and the

hard reset functions. If the push-buttons are closed for a short time, the processor is only

interrupted. If the system still does not respond properly, holding the push-buttons for the

extended setup time (t

SRC

) causes a hard reset of the processor through the reset output.

The Smart Reset™ feature helps significantly increase system stability.

The STM65xx family of Smart Reset™ devices consists of low-current microprocessor reset

circuits targeted at applications such as MP3 players, portable navigation devices or mobile

phones, generally any application that requires delayed reset push-button(s) response for

improved system stability. The STM65xx devices feature single or dual Smart Reset™

inputs (SRx). The delayed Smart Reset™ setup time (t

SRC

) options are adjustable by

adding an external capacitor on the SRC pin or selectable by three-state logic. The delayed

setup period ignores switch closures shorter than t

SRC

, thus preventing undesired resets.

The STM65xx devices have active-low (optionally active-high) open-drain reset (RST

)

output(s) with or without an internal pull-up resistor or push-pull as output options, with or

without the power-on reset function.

Some devices also have an undervoltage monitoring feature: the reset output is also

asserted when the monitored supply voltage V

drops below the specified threshold. The

reset output remains asserted for the reset timeout period (t

REC

) after the monitored supply

voltage goes above the specified threshold.

1.2 STM6510

The STM6510 has two combined Smart Reset™ inputs (SR0 and SR1) with Smart Reset™

setup delay (t

SRC

) programmed by an external capacitor on the SRC pin. An additional

STM6510 feature is adjustable output reset pulse time t

REC

by adding an external capacitor

tREC

Additionally, the V

is monitored and if it drops below the selected V

RST

threshold, the

reset output goes active and remains active while V

is below the V

RST

threshold, plus the

defined duration of the reset pulse t

REC

Description STM6510

6/26 Doc ID 16788 Rev 2

Figure 1. Logic diagram

Figure 2. Pin connections

Table 1. Signal names

Symbol Input/output Description

RST

Output Reset output, active-low (open-drain).

SR0 Input

Primary push-button Smart Reset™ input. Active-low, internal 65 kΩ

pull-up resistor to V

SR1 Input

Secondary push-button Smart Reset™ input. Active-low, internal 65 kΩ

pull-up resistor to V

SRC Input

Smart Reset™ input delay setup control. Connect an external capacitor

to this pin to adjust the delay setup time (t

SRC

TREC

ADJ

Input

Input pin for t

REC

reset pulse duration adjustment. Connect an external

capacitor (C

tREC

) to this pin to determine t

REC

Supply

Supply voltage input. Power supply for the device and an input for the

monitored supply voltage. A 0.1 µF decoupling ceramic capacitor is

recommended to be connected between V

and V

pins.

Supply Ground

NC No connect (not bonded); should be connected to V

SS.

AM00389a

RST

TREC

ADJ

STM6510

SR1

SR0

SRC

AM00390

TREC

ADJ

SRC

STM

6510

RST

SR1

SR0

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P26

STM6510WCACDG6F

Mfr. #:

Buy STM6510WCACDG6F

Manufacturer:

STMicroelectronics

Description:

Supervisory Circuits Dual Push-Button Smart Reset Adjust

Lifecycle:

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STM6510WCACDG6F

STM6510WCACDG6F

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