STM6510 Description
Doc ID 16788 Rev 2 9/26
1.3 Pin descriptions
1.3.1 Power supply (V
CC
)
This pin is used to provide the power to the Smart Reset™ device and to monitor the power
supply. A 0.1 µF decoupling ceramic capacitor is recommended to be connected between
the V
CC
and V
SS
pins.
1.3.2 Ground (V
SS
)
This is the supply ground for the device.
1.3.3 Smart Reset™ push-button inputs (SR0, SR1)
Both SR0 and SR1 need to be held active at the same time for at least t
SRC
to activate the
reset output pulse. Include an internal 65 kΩ
pull-up resistor to V
CC
for each input.
Figure 6. Timing waveforms
1.3.4 Adjustable delay of Smart Reset™ input (SRC pin)
This pin controls the setup time before the push-button action is validated by the reset
output. It is connected to an external capacitor (C
SRC
), which is tied to ground to provide the
desired value of setup time (t
SRC
).
Calculated t
SRC
and C
SRC
examples are given in Table 2. Refer also to Table 6.
AM00393
RST
SR0
SR1
t
SRC
t
REC
Table 2. t
SRC
programmed by an ideal external capacitor
Calculated C
SRC
value [µF]
Setup delay t
SRC
[s]
(1)(2)
1. Example calculations based on an ideal capacitor. During application design and component selection it
should be considered that the current flowing into the external t
SRC
programming capacitor (C
SRC
) is on
the order of 100 nA, therefore a low-leakage capacitor (ceramic or film capacitor) and an adequate PCB
environment should be used to prevent t
SRC
accuracy from being affected. A recommended minimum
value of C
SRC
is 0.01 µF.
2. In case of repeated activations of the t
SRC
counter, an interval of 10 ms min. is needed between the
activations to fully discharge C
SRC
, so that the next t
SRC
is as specified.
Closest common
C
SRC
value [µF]
Min. Typ. Max.
0.2 2 3 4 0.22
0.3 3 4.5 6 0.33
0.6 6 9 12 0.56
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