2014 Microchip Technology Inc. DS20005139E-page 21
SST25WF020A
6.5 DC Characteristics
TABLE 6-5: DC OPERATING CHARACTERISTICS
Symbol Parameter
Limits
Test ConditionsMin Typ
1
1. Value characterized, not fully tested in production.
Max Units
I
DDR
Read Current 6 mA CE#=0.1 V
DD
/0.9 V
DD
@25 MHz,
SO=open
I
DDR2
Read Current 8 mA CE#=0.1 V
DD
/0.9V
DD
@40 MHz,
SO=open
I
DDW
Program and Erase Current 15 mA CE#=V
DD
I
SB
Standby Current 50 μA CE#=V
DD
, V
IN
=V
DD
or V
SS
I
DPD
Deep Power-Down 10 μA CE#=V
DD
, V
IN
=V
DD
or V
SS
I
LI
Input Leakage Current 2 μAV
IN
=GND to V
DD
, V
DD
=V
DD
Max
I
LO
Output Leakage Current 2 μAV
OUT
=GND to V
DD
, V
DD
=V
DD
Max
V
IL
Input Low Voltage -0.3 0.3 V V
DD
=V
DD
Min
V
IH
Input High Voltage 0.7 V
DD
V
DD
+0.3 V V
DD
=V
DD
Max
V
OL
Output Low Voltage 0.2 V I
OL
=100 μA, V
DD
=V
DD
Min
V
OH
Output High Voltage V
DD
-0.2 V I
OH
=-100 μA, V
DD
=V
DD
Min
TABLE 6-6: CAPACITANCE (T
A
= 25°C, F=1 MHZ, OTHER PINS OPEN)
Parameter Description Test Condition Maximum
C
OUT
1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
Output Pin Capacitance V
OUT
= 0V 12 pF
C
IN
1
Input Capacitance V
IN
= 0V 6 pF
TABLE 6-7: RELIABILITY CHARACTERISTICS
Symbol Parameter Minimum Specification Units Test Method
N
END
1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
Endurance 100,000 Cycles JEDEC Standard A117
Status Register Write Cycle 100,000 Cycles JEDEC Standard A117
T
DR
1
Data Retention 20 Years JEDEC Standard A103
I
LTH
1
Latch Up 100 + I
DD
mA JEDEC Standard 78
