OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

LT3508HFE#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26
LT3508
7
3508fd
BLOCK DIAGRAM
Figure 1. Block Diagram of the LT3508 with Associated External Components (One of Two Switching Regulators Shown)
–
+
–
+
+
–
+
–
+
R
SQ
SLAVE
OSC
Σ
INT REG
AND REF
MASTER
OSC
TRACK/SS
1.2µA
CLK1
CLK2
V
IN1
SHDN
0.80V
TRACK/SS
75mV
I
LIMIT
CLAMP
PG
C
C
C
F
R
C
GND
ERROR
AMP
SLOPE
V
C
0.75V
0.625V
CLK
R1
C1
C
IN
SW
FB
BOOST
V
IN
RT/SYNC
V
IN
D2
C3
L1
D1
C1
R2
OUT
3508 F01
+
+
LT3508
8
3508fd
OPERATION
The LT3508 is a dual constant frequency, current mode
regulator with internal power switches. Operation can be
best understood by referring to the Block Diagram. If the
SHDN pin is tied to ground, the LT3508 is shut down and
draws minimal current from the input source tied to the
V
IN
pins. If the SHDN pin exceeds 1V, the internal bias
circuits turn on, including the internal regulator, reference
and oscillator. The switching regulators will only begin to
operate when the SHDN pin exceeds 2.63V.
The switcher is a current mode regulator. Instead of directly
modulating the duty cycle of the power switch, the feedback
loop controls the peak current in the switch during each
cycle. Compared to voltage mode control, current mode
control improves loop dynamics and provides cycle-by-
cycle current limit. A pulse from the oscillator sets the
RS fl ip-fl op and turns on the internal NPN power switch.
Current in the switch and the external inductor begins to
increase. When this current exceeds a level determined
by the voltage at V
C
, current comparator C1 resets the
fl ip-fl op, turning off the switch. The current in the inductor
fl ows through the external Schottky diode and begins to
decrease. The cycle begins again at the next pulse from the
oscillator. In this way, the voltage on the V
C
pin controls
the current through the inductor to the output. The internal
error amplifi er regulates the output current by continually
adjusting the V
C
pin voltage. The threshold for switching
on the V
C
pin is 0.8V, and an active clamp of 1.75V limits
the output current.
The switching frequency is set either by the resistance to
GND at the RT/SYNC pin or the frequency of the logic-level
signal driving the RT/SYNC pin. A detection circuit monitors
for the presence of a SYNC signal on the pin and switches
between the two modes. Unique circuitry generates the
appropriate slope compensation ramps and generates the
180° out-of-phase clocks for the two channels.
The switching regulator performs frequency foldback
during overload conditions. An amplifi er senses when
V
FB
is less than 0.625V and begins decreasing the oscil-
lator frequency down from full frequency to 12% of the
nominal frequency when V
FB
= 0V. The FB pin is less than
0.8V during start-up, short-circuit and overload conditions.
Frequency foldback helps limit switch current under these
conditions.
The switch driver operates either from V
IN
or from the
BOOST pin. An external capacitor and Schottky diode are
used to generate a voltage at the BOOST pin that is higher
than the input supply. This allows the driver to saturate the
internal bipolar NPN power switch for effi cient operation.
The TRACK/SS pin serves as an alternative input to the
error amplifi er. The amplifi er will use the lowest voltage of
either the reference of 0.8V or the voltage on the TRACK/
SS pin as the positive input of error amplifi er. Since the
TRACK/SS pin is driven by a constant current source, a
single capacitor on the pin will generate a linear ramp on
the output voltage. Tying the TRACK/SS pin to a resistor
divider from the output of one of the switching regulators
allows one output to track another.
The PG output is an open-collector transistor that is off
when the output is in regulation, allowing an external re-
sistor to pull the PG pin high. Power good is valid when
the LT3508 is enabled (SHDN is high) and V
IN1
is greater
than 3.7V.
LT3508
9
3508fd
APPLICATIONS INFORMATION
Setting the Output Voltage
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the 1% resis-
tors according to:
R1 = R2
V
OUT
0.8V
–1
⎝
⎜
⎞
⎠
⎟
⎛
R2 should be 20k or less to avoid bias current errors.
Reference designators refer to the Block Diagram.
Minimum Operating Voltage
The minimum operating voltage is determined either by
the LT3508’s undervoltage lockout or by its maximum duty
cycle. If V
IN1
and V
IN2
are tied together, the undervoltage
lockout is at 3.7V or below. If the two inputs are used
separately, then V
IN1
has an undervoltage lockout of 3.7V
or below and V
IN2
has an undervoltage lockout of 3V or
below. Because the internal supply runs off V
IN1
, chan-
nel 2 will not operate unless V
IN1
> 3.7V. The duty cycle
is the fraction of time that the internal switch is on and is
determined by the input and output voltages:
DC =
V
OUT
+ V
F
V
IN
–V
SW
+ V
F
Unlike many fi xed frequency regulators, the LT3508 can
extend its duty cycle by turning on for multiple cycles.
The LT3508 will not switch off at the end of each clock
cycle if there is suffi cient voltage across the boost capaci-
tor (C3 in Figure 1). Eventually, the voltage on the boost
capacitor falls and requires refreshing. Circuitry detects
this condition and forces the switch to turn off, allowing
the inductor current to charge up the boost capacitor. This
places a limitation on the maximum duty cycle as follows:
DC
MAX
=
1
1+
1
β
SW
where β
SW
is equal to the SW pin current divided by the
BOOST pin current as shown in the Typical Performance
Characteristics section. This leads to a minimum input
voltage of:
V
IN(MIN)
=
V
OUT
+ V
F
DC
MAX
–V
F
+ V
SW
where V
F
is the forward voltage drop of the catch diode
(~0.4V) and V
SW
is the voltage drop of the internal switch
(~0.4V at maximum load).
Example: I
SW
= 1.5A and I
BOOST
= 50mA, V
OUT
= 3.3V,
β
SW
= 1.5A/50mA = 30, DC
MAX
= 1/(1+1/30) = 96%:
V
IN(MIN)
=
3.3V + 0.4V
96%
– 0.4V + 0.4V = 3.8V
Maximum Operating Voltage
The maximum operating voltage is determined by the
Absolute Maximum Ratings of the V
IN
and BOOST pins,
and by the minimum duty cycle:
DC
MIN
= t
ON(MIN)
• f
where t
ON(MIN)
is equal to 130ns (for T
J
> 125°C t
ON(MIN)
is equal to 150ns) and f is the switching frequency.
Running at a lower switching frequency allows a lower
minimum duty cycle. The maximum input voltage before
pulse skipping occurs depends on the output voltage and
the minimum duty cycle:
V
IN(PS)
=
V
OUT
+ V
F
DC
MIN
–V
F
+ V
SW
Example: f = 790kHz, V
OUT
= 3.3V, DC
MIN
= 130ns • 790kHz
= 0.103:
V
IN(PS)
=
3.3V + 0.4V
0.103
– 0.4V + 0.4V = 36V
The LT3508 will regulate the output current at input voltages
greater than V
IN(PS)
. For example, an application with an
output voltage of 1.8V and switching frequency of 1.5MHz
has a V
IN(PS)
of 11.3V, as shown in Figure 2. Figure 3 shows
operation at 18V. Output ripple and peak inductor current
have signifi cantly increased. Exceeding V
IN(PS)
is safe if
the output is in regulation, if the external components have
adequate ratings to handle the peak conditions and if the
peak inductor current does not exceed 3.2A. A saturating
inductor may further reduce performance. Do not exceed
V
IN(PS)
during start-up or overload conditions (for outputs
greater than 5V, use V
OUT
= 5V to calculate V
IN(PS)
). For
operation above 20V in pulse skipping mode, program
the switching frequency to 1.1MHz or less.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26

LT3508HFE#PBF

Mfr. #:
Buy LT3508HFE#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Dual Monolithic 1.4A Step-Down Switching Regulator
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet