NL3S22AH, NL3S22UH
www.onsemi.com
5
AC ELECTRICAL CHARACTERISTICS (Typical values are at V
CC
= +3.6 V and T
A
= +25°C)
Symbol
Parameter Test Conditions V
CC
(V)
−40 ⁰C to 85 ⁰C
Unit
Min Typ Max
AUDIO SWITCH (AUDP/AUDN e D+/D−)
THD
Audio THD f = 20 Hz to 20 kHz,
V
IS
= 1.0 V
RMS
, DC Bias = 0 V,
R
L
= 32 W
V
IS
= 0.4 V
RMS
, DC Bias = 0 V,
R
L
= 16 W
2.7 – 3.6 −
−113
−109
− dB
PSRR Power Supply Ripple
Rejection
From V
CC
unto AUDP/AUDN,
f = 217 Hz, R
L
= 16 W
2.7 – 3.6 − 106 − dB
DATA SWITCH (HDP/HDN e D+/D−)
C
ON
Equivalent
ON−Capacitance
Switch ON, f = 1 MHz 3.6 − 8.7 10 pF
C
OFF
Equivalent
OFF−Capacitance
Switch OFF, f = 1 MHz 3.6 − 1.8 − pF
D
IL
Differential Insertion
Loss
f = 10 MHz 2.7 – 3.6 − −0.5 −
dB
f = 800 MHz 2.7 – 3.6 − −2.8 −
D
ISO
Differential Off−Isolation
f = 10 MHz 2.7 – 3.6 − −54 −
dB
f = 800 MHz 2.7 – 3.6 − −25 −
D
CTK
Differential Crosstalk
f = 10 MHz 2.7 – 3.6 − −62 −
dB
f = 800 MHz 2.7 – 3.6 − −28 −
PSRR Power Supply Ripple
Rejection
From V
CC
unto D+/D−,
f = 217 Hz, R
L
= 50 W
2.7 – 3.6 − 111 − dB
DYNAMIC TIMING
t
PD
Propagation Delay
(Notes 5 and 6)
V
NOn
or V
NCn
= 0V, R
L
= 50 W
2.7 – 3.6 − 0.25 − ns
t
EN
Enable Time,
EN to HDx
EN to AUDx
V
IS
= 1 V, R
L
= 50 W, C
L
= 7 pF
(fixture only)
2.7 – 3.6
−
−
2.1
5.1
−
−
ms
t
DIS
Disable Time,
EN to HDx
EN to AUDx
V
IS
= 1 V, R
L
= 50 W, C
L
= 7 pF
(fixture only)
2.7 – 3.6
−
−
157
53
−
−
ns
t
ON
Turn−On Time,
SEL to HDx
SEL to AUDx
V
IS
= 1 V, R
L
= 50 W, C
L
= 7 pF
(fixture only)
2.7 – 3.6
−
−
0.3
3.4
−
−
ms
t
OFF
Turn−Off Time,
SEL to HDx
SEL to AUDx
V
IS
= 1 V, R
L
= 50 W, C
L
= 7 pF
(fixture only)
2.7 – 3.6
−
−
157
44
−
−
ns
t
INIT
Initialization Time (Notes 5
and 7), V
CC
to D+/D−
V
IS
= 1 V, R
L
= 50 W, C
L
= 7 pF
(fixture only)
2.7 – 3.6 150 − −
ms
t
sk(b−b)
Bit to bit skew Within the same differential channel 2.7 – 3.6 − 5 − ps
t
sk(ch−ch)
Channel to channel skew Maximum skew between all chan-
nels
2.7 – 3.6 − 5 − ps
5. Guaranteed by design.
6. No other delays than the RC network formed by the load resistance and the load capacitance of the switch are added on the bus. For a 10
pF load, this delay is 5 ns which is much smaller than rise and fall time of typical driving systems. Propagation delays on the bus are
determined by the driving circuit on the driving side and its interactions with the load of the driven side.
7. Wait time required after V
CC
power−up to operating level before data access is valid.
