LTC7138
16
7138f
For more information www.linear.com/LTC7138
applicaTions inForMaTion
Similarly, for applications that do not require a precise
UVLO, the RUN pin can be tied to V
IN
. In this configuration,
the UVLO threshold is limited to the internal V
IN
UVLO
thresholds as shown in the Electrical Characteristics table.
The resistor values for the OVLO can be computed using
the previous equations with R3 = 0Ω.
Be aware that the OVLO pin cannot be allowed to exceed
its absolute maximum rating of 6V. To keep the voltage
on the OVLO pin from exceeding 6V, the following relation
should be satisfied:
V
IN(MAX)
•
R3+R4+R5
< 6V
If this equation cannot be satisfied in the application,
connect a 4.7V Zener diode between the OVLO pin and
ground to clamp the OVLO pin voltage.
Soft-Start
Soft-start is implemented by ramping the effective refer
-
ence voltage from 0V to 0.8V. To increase the duration of
the soft-start, place a capacitor from the SS pin to ground.
An internal 5µA pull-up current
will charge this
capacitor.
The value of the soft-start capacitor can be calculated by
the following equation:
C
SS
= Soft-Start Time •
The minimum soft-start time is limited to the internal
soft-start timer of 1ms. When the LTC7138 detects a
fault condition (input supply undervoltage/overvoltage or
overtemperature) or when the RUN pin falls below 1.1V,
the SS pin is quickly pulled to ground and the internal
soft-start timer is reset. This ensures an orderly restart
when using an external soft-start capacitor.
Note that the soft-start capacitor may not be the limiting
factor in the output voltage ramp. The maximum output
current, which is equal to half of the peak current, must
charge the output capacitor from 0V to its regulated value.
For small peak currents or large output capacitors, this
ramp time can be significant. Therefore, the output voltage
ramp time from 0V to the regulated V
OUT
value is limited
to a minimum of
Ramp Time ≥
OUT
I
V
OUT
Optimizing Output Voltage Ripple
After the peak current resistor and inductor have been
selected to meet the load current and frequency require
-
ments, an optional capacitor, C
ISET
can be added in parallel
with R
ISET
to reduce the output voltage ripple dependency
on load current.
At light loads the output voltage ripple will be a maximum.
The peak inductor current is controlled by the voltage on
the I
SET
pin. The current out of the I
SET
pin is 5µA while
the LTC7138 is active and is reduced to 1µA during sleep
mode. The I
SET
current will return to 5µA on the first
switching cycle after sleep mode. Placing a parallel RC
network to ground on the I
SET
pin filters the I
SET
voltage
as the LTC7138 enters and exits sleep mode, which in turn
will affect the output voltage ripple, efficiency, and load
step transient performance.
Higher Current Applications
For applications that require more than 400mA, the
LTC7138 provides a feedback comparator output pin
(FBO) for driving additional LTC7138s. When the FBO pin
of a master LTC7138 is connected to the V
FB
pin of one
or more slave LTC7138s, the master controls the burst
cycle of the slaves.
Figure 10 shows an example of a 5V, 800mA regulator
using two LTC7138s. The master is configured for a 5V
fixed output with external soft-start and V
IN
UVLO/OVLO
levels set by the RUN and OVLO pins. Since the slave is
directly controlled by the master, its SS pin should be float
-
ing, RUN should be tied to V
IN
, and OVLO should be tied
to ground. Furthermore, the slave should be configured
for a 1.8V fixed output (V
PRG1
= V
PRG2
= SS) to set the
