TB6562ANG/AFG
2012-09-28
13
Application Circuit
The application circuit below is for reference only and requires thorough evaluation at the mass production design stage.
In furnishing this example of an application circuit, Toshiba does not grant the use of any industrial property rights.
Note 1: A power supply capacitor should be connected between V
CC
and RSA (RSB), and as close as possible to
the IC.
Note 2: C2 and C3 should be connected as close as possible to S-GND.
Note 3: In powering on, set the IC as follows:
SB = Low (standby mode)
or
XA1 = XA2 = XB1 = XB2 = High (current value = 0%)
Note 4: When the V
ref
is being changed, a DAC output can be connected directly to the V
ref
pin.
Note 5: The V
CC
pins (pin 10, pin 21, and pin 29) should be shorted externally.
Note 6: Connect the capacitor C4 to the V
ref
to reduce the switching noise.
(Note 2)
24 V
V
CC
OSCV
reg
GND
OUT1A
RSA
TB6562AFG
2 28 10 21 29
3
4
5
6
27
26
25
11
14
13
20
17
18
PORT1
PORT2
PORT3
PORT4
PORT5
PORT6
PORT7
PORT8
PORT9
GND
DAC output signal
SB
Phase A
X1A
X2A
Phase B
X1B
X2B
12 19
OUT2A
OUT1B
RSB
OUT2B
V
ref
AV
ref
B
1, 7, 8, 9, 15, 16, 22, 23 24, 30
C1
C2
C3
(Note 4) (Note 1)
R1 R1
R2
V
DD
Stepping
motor
5 V
V
CC
V
CC
C4
