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BUK7605-30A,118
P1-P3
P4-P6
P7-P7
Philips Semiconductors
Product specification
TrenchMOS
transistor
BUK7605-30A
Standard level FET
Fig.7. Typical on-state resistance, T
j
= 25 ˚C
.
R
DS(ON)
= f(V
GS
); conditions I
D
= 25 A;
Fig.8. Typical transfer characteristics.
I
D
= f(V
GS
)
; conditions: V
DS
= 25 V; parameter T
j
Fig.9. Typical transconductance, T
j
= 25 ˚C
.
g
fs
= f(I
D
); conditions: V
DS
= 25 V
Fig.10. Normalised drain-source on-state resistance.
a = R
DS(ON)
/R
DS(ON)25 ˚C
= f(T
j
); I
D
= 25 A; V
GS
= 5 V
Fig.11. Gate threshold voltage.
V
GS(TO)
= f(T
j
); conditions: I
D
= 1 mA; V
DS
= V
GS
Fig.12. Sub-threshold drain current.
I
D
= f(V
GS)
; conditions: T
j
= 25 ˚C; V
DS
= V
GS
5
1
01
52
0
3
3.5
4
4.5
5
5.5
6
6.5
7
7.5
RDS(ON)/mOhm
VGS/V
-100
0
100
200
0
0.5
1
1.5
2
30V TrenchMOS
Tj / C
a
150
50
-50
01234567
0
20
40
60
80
100
ID/A
VGS/V
Tj/C =
175
25
BUK759-60
-100
-50
0
50
100
150
200
0
1
2
3
4
5
Tj / C
VGS(TO) / V
max.
typ.
min.
0
2
04
06
08
0
1
0
0
0
10
20
30
40
50
60
70
80
90
gfs/S
ID/A
0123
45
1E-06
1E-05
1E-04
1E-03
1E-02
1E-01
Sub-Threshold Conduction
typ
2%
98%
August 1999
4
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOS
transistor
BUK7605-30A
Standard level FET
Fig.13. Typical capacitances, C
iss
, C
oss
, C
rss
.
C = f(V
DS
); conditions: V
GS
= 0 V; f = 1 MHz
Fig.14. Typical turn-on gate-charge characteristics.
V
GS
= f(Q
G
); conditions: I
D
= 50 A; parameter V
DS
Fig.15. Typical reverse diode current.
I
F
= f(V
SDS
); conditions: V
GS
= 0 V; parameter T
j
Fig.16. Normalised avalanche energy rating.
W
DSS
% = f(T
mb
); conditions: I
D
= 75 A
Fig.17. Avalanche energy test circuit.
Fig.18. Switching test circuit.
0.01
0.1
1
10
100
0
1
2
3
4
5
6
7
8
9
10
Thousands pF
VDS/V
Ciss
Coss
Crss
20
40
60
80
100
120
140
160
180
Tmb / C
120
110
100
90
80
70
60
50
40
30
20
10
0
WDSS%
0
20
40
60
80
100
120
140
0
2
4
6
8
10
12
VGS/V
QG/nC
VDS =
14V
24V
L
T.U.T.
VDD
RGS
R 01
VDS
-ID/100
+
-
shunt
VGS
0
W
DSS
=
0.5
⋅
LI
D
2
⋅
BV
DSS
/(
BV
DSS
−
V
DD
)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
0
20
40
60
80
100
ID/A
VSDS/V
Tj/C =
175
25
RD
T.U.T.
VDD
RG
VDS
+
-
VGS
0
August 1999
5
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOS
transistor
BUK7605-30A
Standard level FET
MECHANICAL DATA
Fig.19. SOT404 surface mounting package. Centre pin connected to mounting base.
Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.
3. Epoxy meets UL94 V0 at 1/8".
UNIT
A
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
mm
A
1
D
1
D
max.
E
eL
p
H
D
Q
c
2.54
2.60
2.20
15.40
14.80
2.90
2.10
11
1.60
1.20
10.30
9.70
4.50
4.10
1.40
1.27
0.85
0.60
0.64
0.46
b
DIMENSIONS (mm are the original dimensions)
SOT404
0
2.5
5 mm
scale
Plastic single-ended surface mounted package (Philips version of D
2
-PAK); 3 leads
(one lead cropped)
SOT404
e
e
E
b
D
1
H
D
D
Q
L
p
c
A
1
A
13
2
mounting
base
98-12-14
99-06-25
August 1999
6
Rev 1.100
P1-P3
P4-P6
P7-P7
BUK7605-30A,118
Mfr. #:
Buy BUK7605-30A,118
Manufacturer:
NXP Semiconductors
Description:
MOSFET N-CH 30V 75A D2PAK
Lifecycle:
New from this manufacturer.
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